Abstract

DSPs, as a type of specialized processor, have customized architectures to achieve high performance in signal processing applications. Traditionally, DSPs are designed to maximize performance for inner loops containing a product of sums. Thus, DSPs usually include hardware support for fast arithmetic, including single cycle multiply instructions (often both fixed-point and floating-point), large (extra wide) accumulators, and hardware support for highly pipelined, parallel computation and data movement. To keep a steady flow of operands available, DSP systems usually rely on specialized, high bandwidth memory subsystems. In particular, all DSP processors must— perform high-speed arithmetic, make multiple accesses to and from memory in a single cycle, and be able to process data to and from the real world. To accomplish these goals, processor designers draw from a wide range of advanced architectural techniques. Thus, to create high performance DSP applications, programmers must master not only the relevant DSP algorithms, but also the idioms of the particular architecture. This chapter provides some examples of the various DSP architectures. DSP controllers and cores are discussed as well as high performance DSPs.

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