4H-SiC V-Groove Trench MOSFETs with Low Specific On-State Resistance and High Reliability

Abstract

1. Introduction Silicon Carbide (SiC) MOSFETs have attracted attention as high performance power devices due to their unique material properties such as wide bandgap, high electric field strength, high saturation velocity, and high thermal conductivity. However, the obtained channel mobility (field effect mobility) of 5-30 cm2V-1s-1 is substantially lower than the bulk mobility (1000 cm2V-1s-1) because of the high SiO2/SiC interface state density (D it). Thus, the reduction of the interface states is the key issue in the development of SiC MOS devices. In order to improve the channel mobility, we proposed MOSFETs fabricated on the 4H-SiC(0-33-8) face which has the lower interface state density than the 4H-SiC(0001) face. In fact, a high channel mobility of 80 cm2V-1s-1was attained by using the superior MOS properties. 2. Device structure of the V-groove Trench MOSFETs We have proposed the V-groove trench MOSFETs (VMOSFETs) with the 4H-SiC{0-33-8} face as the trench sidewalls for the channel region. Furthermore, the buried p+regions below the trench bottom corner and the thick oxide layer at the trench bottom were employed. Both of these contribute to alleviate the electric field in the trench bottom oxide layer in order to realize high breakdown voltage over 1200V without gate oxide breakdown. The schematic cross-sectional view of the VMOSFET is shown in Fig.1 3. Device Fabrication Process The SiC epitaxial layer was grown on 4o off-axis n-type 4H-SiC(000-1) substrate by chemical vapor deposition (CVD). The n+, p+ and p-body regions were formed by P and Al ion implantation. The channel length is 0.6 mm along the trench sidewall. Thereafter, the V-groove structures with the 4H-SiC{0-33-8} sidewalls were fabricated through the thermochemical etching process in Cl2 ambient using a SiO2 mask. Gate oxide was thermally grown, followed by nitridation and post oxidation annealing (POA), resulting in an oxide thickness of about 50 nm. The source and drain contact metal were fabricated and alloyed at the temperature of 1000oC. The Al electrode was deposited on the alloyed contact metal. 4. Results and Discussion Figure 2 shows the static device characteristics. Figure 2 (a) shows the on-state forward I D-V DS characteristics of the VMOSFETs. The measured specific on-resistance in accordance with the active area size is 2.0 mΩ cm2 (V GS = 20 V, V DS = 1 V) at room temperature. As shown in fig. 2 (b), the breakdown voltage of above 1200 V is obtained. Figure 3 shows the on-state forward I D-V DScharacteristics of the VMOSFETs of 6.0-mm-square chip. A large current of 150 A is obtained with a single chip.Figure 4 shows the temperature dependence of the specific on-resistance of the V MOSFET and a planar DMOSFET on 4o off 4H-SiC(0001). The specific on-resistance of the DMOSFET decreases from -50oC to 0oC as expected due to the thermal emission of trapped electrons near oxide interfaces. In contrast, the specific on-resistance of the VMOSFET monotonically increases from -50oC to 175oC. This result shows that a drift resistance in the epitaxial layer of the VMOSFETs is more dominant than a channel resistance because of the low interface state density (D it) of SiO2/4H- SiC(0-33-8).We evaluated the stability of the threshold voltage of the VMOSFETs. Figure 5 shows the High Temperature Gate Bias (HTGB) test results of the VMOSFETs under a gate bias of +20V or -10V at 175oC. The threshold voltage of the VMOSFETs was 3 V (V DS = 10 V, I D = 5 mA cm-2). After the 1000 hour test, the threshold voltage shifts were only less than ±0.2 V of both positive and negative gate bias tests. These results show the excellent threshold voltage stability of the VMOSFETs for long term operation. This is considered due to the low interface trap density of SiO2/4H-SiC(0-33-8). 5. Summary The originally structured 4H-SiC V-groove trench MOSFET with the {0-33-8} face for the trench sidewalls has been proposed. The inclined trench structure can be fabricated by the thermochemical chlorine etching, resulting in the smooth low damage surface. Consequently, the low specific on-state resistance of the VMOSFET is attained. Thus a large current of 150A was obtained with a single 6-mm-square chip. Also High Temperature Gate Bias (HTGB) test was performed under a gate bias of +20V or -10V at 175oC. After the 1000 hour test, the threshold voltage kept stable with only less than ±0.2 V voltage shifts. Due to these advantages, the VMOSFETs are suitable for use in automotive electronic devices and the regenerative energy generation system applications. Figure 1