4-Bit serial shift register with reset ability and 4-bit LFSR in QCA technology using minimum number of cells and delay

Abstract

Quantum-dot cellular automata (QCA) nanotechnology is one of the proposed technologies for replacing CMOS technology. Shift registers are one of the important areas in the design of digital circuits and memory structures. Given the importance of shift registers, in this paper, new structures have been proposed for shift registers in QCA nanotechnology. At first, proposed D-latch is presented to be used in the main block of shift registers, which has only 18 cells, a delay of 0.5 cycles and less area than previous designs. Subsequently, a 4-bit series register will be presented using the proposed D-latch, which is at least 30% lower than the previous ones in terms of cell numbers and area. In addition, a reset pin is needed in shift registers which are used in microprocessors. Most of the previous designs did not have the reset pins and therefore a new version of 4-bit shift register which has the reset pin will be presented in this paper. New and former designs have been expanded from 2 bits to 8 bits, and parameters variations are presented in the table and diagrams. The proposed new designs have interesting features in terms of stability, number of cells and occupied area, compared to previous designs that do not have the reset capability. In addition, the proposed shift register is used to design an optimized LFSR circuit in QCA nanotechnology with only 157 cells and 0.2 µm2 area.