Abstract
A novel bandwidth‐reduced display interface technique using adaptive sub‐color optimization with DCT (AS‐DCT) has been proposed to be able to lower both implementation cost and power consumption with visually lossless image quality for high resolution display products. A DCT conversion is applied to 1‐D line pixel data, and 50% of the redundant data has been compressed adaptively based on both sub‐color priority and the distribution of AC data components. A PSNR of about 45.86dB level was achieved for a given set of test images, and it was implemented using RTL coding in a FPGA to verify image quality and logic size level on an actual display system. Through the proposed technique, it is expected that it can easily reduce display data bandwidth without latency and lower its implementation cost for future display devices, such as 8K/16K resolutions, 240Hz/480Hz refresh rates, immersive AR/VR, Light field displays and beyond.
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