Abstract

Microstructures with flexible and stretchable properties display tremendous potential applications including integrated systems, wearable devices and bio-sensor electronics. Hence, it is essential to develop an effective method for fabricating curvilinear and flexural microstructures. Despite significant advances in 2D stretchable inorganic structures, large scale fabrication of unique 3D microstructures at a low cost remains challenging. Here, we demonstrate that the 3D microstructures can be achieved by grayscale lithography to produce a curved photoresist (PR) template, where the PR acts as sacrificial layer to form wavelike arched structures. Using plasma-enhanced chemical vapor deposition (PECVD) process at low temperature, the curved PR topography can be transferred to the silicon dioxide layer. Subsequently, plasma etching can be used to fabricate the arched stripe arrays. The wavelike silicon dioxide arch microstructure exhibits Young modulus and fracture strength of 52 GPa and 300 MPa, respectively. The model of stress distribution inside the microstructure was also established, which compares well with the experimental results. This approach of fabricating a wavelike arch structure may become a promising route to produce a variety of stretchable sensors, actuators and circuits, thus providing unique opportunities for emerging classes of robust 3D integrated systems.

Highlights

  • Since the rise of the semiconductor industry in the 1960s, standard planar lithography processes have been used for producing transistors and integrated circuit (IC) chips, which are still widely used in current microelectronic techniques[1,2,3,4]

  • We show that a proper grayscale mask design is critical to fabricate gently sloped arch structures, whose design may be guided by the results of morphology simulation

  • The dynamic mechanical property of the arch structure up to its fracture point is investigated in detail by atomic force microscopy (AFM) and finite element analysis (FEA)

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Summary

Introduction

Since the rise of the semiconductor industry in the 1960s, standard planar lithography processes have been used for producing transistors and integrated circuit (IC) chips, which are still widely used in current microelectronic techniques[1,2,3,4]. There are several principal approaches to fabricate 3D topographies, such as electron beam lithography[11], nanoimprint lithography[12], capillary force lithography[13] and grayscale lithography[14,15,16] Among those approaches, grayscale lithography has become the most common technique to fabricate 3D structures due to its compatibility with standard IC process, large-scale preparation for commercial industry, and controllable morphology using proper mask design. If the pixel size in the mask is larger than the minimum resolution, all spectral orders can pass through the system to the wafer plane and the detailed information of the object image can be perfectly projected on the PR layer, see Figure S1. One can obtain a curvilinear microstructure caused by the gradient light intensity distribution

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