Abstract
Summary form only given. A SIMD architecture consists of one instruction processor (IP) with a separate memory for instructions, and a set of processing elements (PEs), each with its own separate memory. The instructions issued by the IP are sent to every PE simultaneously. When memory is addressed, the value in memory for each PE is simultaneously sent to its PE. Thus, thousands of data elements may be sent to their respective PEs simultaneously through execution of a single instruction. What's a MIMD? The MIMD architecture consists of a collection of SISD (single instruction single data) machines coupled together in some way to act on the RTDB problem. The MIMD architecture connects SISD processors to work on the RTDB problem. The MP spends most of its time passing data back and forth between the SISDs. Then the MP executes concurrent processes, and resynchronizes the system.
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