3D Double-Gate Junctionless Nanowire Transistor-Based Pass Transistor Logic Circuits for Digital Applications

Abstract

We investigate the circuit performance of the junctionless nanowire transistor. We have demonstrated pass transistor-based logic gates using the junctionless transistor. Pass transistor-based basic logic gates: AND, OR, XOR are designed using only the n-type junctionless nanowire transistor with HfO2 gate dielectric. Simulations of these circuits have been studied and analyzed under a mixed-mode environment. Outcomes of the analysis show that 3D dual gate junctionless nanowire transistor with 20 nm gate length well performed for pass transistor logic. In addition, a junctionless nanowire transistor-made multiplexer has also been studied and found to perform well. A high-k gate dielectric was used for all junctionless transistors as the higher k value improves the device characteristics and circuit performances. Our study also shows that the junctionless nanowire transistor-based pass transistor logics for digital circuit perform well.