Abstract

Exponential increase in data traffic drives drastic changes in optical networking. To introduce optical switching in conjunction with software-defined networking (SDN) technology is a promising direction for reducing the cost of data switching, enhancing scalability of optical networks. Recently, we have developed a hierarchical optical switching node using optical path switches, wavelength-selective switches, and optical data unit (ODU) cross-connects for dynamic optical switching in networks. One of the key components is a strictly-non-blocking optical switch. A few dozen port counts are required at low cost. Planar waveguide circuits based on Si photonics are promising for achieving such a cost-effective optical path switch. Siphotonics strictly-non-blocking switch fabrics with various topologies were developed so far, where the port count was limited up to 8 × 8. In this talk, we introduce a 32 × 32 path-independent-insertion-loss (PILOSS) Si-wire optical switch that integrates 1024 Mach-Zehnder switches based on thermooptic effects. There are two technical challenges: high process uniformity within the die and dense electrical packaging for more than 2000 I/O are key technologies to achieve the high port count of 32×32. Advanced CMOS process facilities in AIST, featuring ArF immersion lithography, is used for achieving high uniformity For reliable electrical contacts between the chip and control electronics, flip-chip electrical packaging using a land grid array (LGA) interposer is developed. The 32×32 PILOSS Si-wire optical switch with a small chip footprint of 11×25mm2 is successfully demonstrated.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call