300-kilo-Gate Sea-of-Gate Type Gate Arrays Fabricated Using 0.25-µm-Gate Ultra-Thin-Film Fully-Depleted Complementary Metal-Oxide-Semiconductor Separation by IMplanted OXygen (CMOS/SIMOX) Technology with Tungsten-Covered Source and Drain

Abstract

A 120-kilo-gate (KG) fully functional gate-array LSI consisting of basic cells with a single-contact layout (single-contact cells) is fabricated on 300-KG sea-of-gate (SOG) type gate arrays using 0.25-µm ultra-thin-film fully-depleted (FD) complementary metal-oxide-semiconductor separation by implanted oxygen (CMOS/SIMOX) technology with selective W chemical vapor deposition (CVD). This paper shows that the performance of circuits made with single-contact cells can be as high as that with multi-contact cells, when the source/drain sheet resistance is below 5 Ω/sq. It also shows that selective W-CVD with the hydrogenation-and-hydrogen-termination (HHT) treatment can provide this sheet resistance even in ultra-thin-film silicon-on-insulator (SOI) substrates with a 50-nm-thick silicon layer. Single-contact cells built with selective W-CVD were applied to metal-oxide-semiconductor field effect transistors (MOSFETs), 2-input NAND circuits, and gate-array LSIs. Consequently, these cells did not degrade the drain current of transistors, or raise the gate delay time of the circuits. Single-contact cells built with W did not lower the yield of LSIs up to 120 KG compared to LSIs made with multi-contact cells without W. Furthermore, the 120-KG LSI consisting of single contact cells with W had no decrease in speed, compared to one with multi-contact cells. These results indicate that the selective W-CVD is a promising technology to increase the packing density of LSIs made with ultra-thin-film FD CMOS/SOI.