Abstract

To improve the heating efficiency and reduce the reset current of phase change memory, the volume-confined cells have been widely studied by employing highly conformal deposition techniques. In this work, a scalable confined structure with sidewall phase change material spacer is investigated for the integration in 12-inch wafer using physical vapor deposition and the subsequent anisotropic plasma etching back process. The finite element simulations reveal a remarkable 80% increase in heating efficiency by taking the confined structure. The isolated and compact trenches with the aspect ratio ranging from 0.40 to 1.04 are designed to accommodate the sidewall phase change material. The scaling down of the critical dimension of the rail-like spacer is observed as the aspect ratio increases. The spacer width of around 34 nm is well beyond the lithography capability used in this study. These results provide a promising path to fabricate the low-power and high-density memory device in a way fully compatible with the manufacturing technology.

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