Abstract

Here, we report the physical electro-thermal modeling of nanoscale Y <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> -based memristor devices. The simulation is carried out by the combined software package of COMSOL Multiphysics and MATLAB. The presented physical modeling is based on the minimization of free energy at an applied voltage. The simulated results exhibit a stable pinched hysteresis loop in resistive switching (RS) response in multiple switching cycles. The RS responses show low values of coefficient of variability ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${C}_{V}$ </tex-math></inline-formula> ), i.e., 17.36% and 17.09% in SET and RESET voltages, respectively, during cycle-to-cycle variation. The impact of voltage ramp rate ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{RR}$ </tex-math></inline-formula> ) on the device characteristics such as switching response and synaptic plasticity behavior of the device is investigated. The simulated outcomes significantly depict the impact of oxide layer thickness on the switching voltages in the nanoscale device.

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