Abstract
This paper presents a bandpass wireless 3-D chip to chip interface technique. The proposed technique uses direct amplitude modulation of the free running oscillator which especially utilizes the coupling capacitance between two stacked chips as a part of the resonator. Therefore, the oscillator is three dimensionally configured and a simple envelope detector can be used as a receiver without any additional matching circuitry. The proposed link was designed and fabricated using 110 nm CMOS technology and experimental results successfully showed the data transmission at a data rate of 2 Gb/s for the stacked chips with a thickness of 50 consuming 4.32 mW. The sizes of the Tx and Rx chips are 0.045 and 0.029 , respectively.
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