Abstract

This letter presents the design approach for a compact, single-stage, wideband MMIC power amplifier. A method is proposed to compensate for the output capacitance of the active device over a frequency range as wide as possible, with minimum impact on the achievable output power, which leads to a two-element compensating network. A three-section transformer is then adopted for a real-to-real transformation. The CW characterization shows the output power higher than 32 dBm and the drain efficiency between 35% and 45%, over a fractional bandwidth of 148%, from 3 to 20 GHz.

Highlights

  • F UTURE high-performance broadband systems, such as RF and microwave front-end systems, radar, and software reconfigurable communication links, require wideband microwave monolithic integrated circuit (MMIC) power amplifiers (PAs)

  • We propose a novel design strategy to compensate for the output capacitance COUT of the high-electron-mobility transistors (HEMTs) for any Manuscript received February 17, 2021; accepted March 2, 2021

  • The dispersion effects, which can be modeled with an equivalent output capacitance, make the extrinsic load strongly dependent on the frequency

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Summary

INTRODUCTION

F UTURE high-performance broadband systems, such as RF and microwave front-end systems, radar, and software reconfigurable communication links, require wideband microwave monolithic integrated circuit (MMIC) power amplifiers (PAs). To achieve decade-bandwidth performance, distributed PAs are typically used, normally in a nonuniform topology to improve output power and efficiency [1]–[4]. Other wideband GaN PAs have been proposed, relying, for example, on reactive matching [5] or a reconfigurable dualband operation [6], covering smaller bandwidths (6–18 GHz). We propose a novel design strategy to compensate for the output capacitance COUT of the HEMT for any Manuscript received February 17, 2021; accepted March 2, 2021. A 3–20-GHz singleended MMIC amplifier fabricated on a 100-nm GaN-on-Si process is presented to demonstrate the validity of the approach. The results compare well with the state of the art (see Table I) while relying on a simpler design approach and using a single transistor and small MMIC area

Optimal Load Identification
Idealized Solution
OMN Design
Findings
CONCLUSION

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