2-Mb Embedded Phase Change Memory With 16-ns Read Access Time and 5-Mb/s Write Throughput in 90-nm BCD Technology for Automotive Applications

Marcella Carissimi ,D Gallinari,D Manfre,F Disegni,C Auricchio,G Torelli ,Vivek Tyagi ,Silvano R Rossi ,D Brambilla ,A Cabrini ,L Croce ,E Calvetti ,M Pasotti ,Vikas Rana ,S Zanchi ,L Capecchi ,Rajarshi Mukherjee ,P Zuliani ,A Gambero ,C Torti ,Riccardo Zurla ,Prabhat Mishra

doi:10.1109/esscirc.2019.8902656

2-Mb Embedded Phase Change Memory With 16-ns Read Access Time and 5-Mb/s Write Throughput in 90-nm BCD Technology for Automotive Applications

Marcella Carissimi , D Gallinari + Show 20 more

https://doi.org/10.1109/esscirc.2019.8902656

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Publication Date: Sep 1, 2019

Citations: 11

Affiliation: STMicroelectronics (Italy), University of Pavia, STMicroelectronics (India)

#Embedded Phase Change Memory #Data Processing Logic + Show 8 more

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Abstract

This letter presents a 2-Mb embedded phase change memory (ePCM) macrocell designed in 90-nm BJT-CMOS-DMOS (BCD) technology able to address the next generation of automotive and smart-power products exploiting an ePCM cell based on a Ge-rich chalcogenide alloy. The optimized memory allows 16-ns random access time and 5-Mbit/s write throughput from −40 °C to 175 °C, with 100 kcycle endurance. The sense amplifier, the programming circuitry, and the data processing logic able to meet automotive requirements are described. The silicon results are provided.

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