Abstract

Limited by battery capacity, advanced MCUs for IoT applications require ultra-low power consumption. In a conventional design, most modules except the crystal oscillator (XO32), real-time clock (RTC), and retention memory are turned off to reduce the current in sleep state, but the sleep power still accounts for most of the total power consumption. When the load current is reduced to $\sim 100$ nA, the transient current of a switched capacitor voltage regulator (SCVR) remains unchanged $(\sim 100$ nA), so that power efficiency is low and the sleep current cannot be reduced further. Voltage stacking has been proposed to address power efficiency [1, 2]. Prior voltage stacking architectures could not realize dynamic switching between flat mode and stack mode, leading to high dynamic power in the normal state. In addition, the SCVR still consumes some power during the sleep state [3]. This paper proposes a dynamic voltage-stacking scheme, which supports two operating modes: a flat mode in the normal state and a stack mode in the sleep state. In the flat mode, the retention memory, RTC, and XO32 are connected in parallel and are powered by the SCVR. In the stack mode, the four instances are connected in series, including the SRAM1 (level1), the SRAM2 (level2), the XO32, and the RTC (level3), and the on-chip SCVR is shut down for power saving.

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