Abstract
Semiconductors that brings about advanced information society, was made its performance to improve by miniaturization. However semiconductors, as a product system, is reaching near-term economic and physical limitations. And 3D integration, such as 3D-SiP, is expected as the break through. But traditional design method based on only scaling rule can't apply to this. Therefore it is difficult to decide the development direction of the next generation semiconductor device in early phase of system LSI design. In addition, design method based on design rule has various problems. So we need to construct design method for system LSI. As a solution for these problems, we build up a parametric model and a workflow for proper system LSI structure including 3D-SiP. As a result, we get the proper structure of next generation semiconductor device by using the parametric model and workflow.
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