Abstract

Semiconductors that brings about advanced information society, was made its performance to improve by miniaturization. However semiconductors, as a product system, is reaching near-term economic and physical limitations. And 3D integration, such as 3D-SiP, is expected as the break through. But traditional design method based on only scaling rule can't apply to this. Therefore it is difficult to decide the development direction of the next generation semiconductor device in early phase of system LSI design. In addition, design method based on design rule has various problems. So we need to construct design method for system LSI. As a solution for these problems, we build up a parametric model and a workflow for proper system LSI structure including 3D-SiP. As a result, we get the proper structure of next generation semiconductor device by using the parametric model and workflow.

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.