20-nm In0.8Ga0.2As MOSHEMT MMIC Technology on Silicon

Abstract

High-gain millimeter-wave monolithic integrated circuit (MMIC) amplifiers have been developed, based on a planar metamorphic 20-nm gate length InGaAs metal–oxide–semiconductor high-electron-mobility transistor (MOSHEMT) technology on Si. Therefore, an Al2 O 3/Hf O 2 layer stack was deposited as a gate dielectric directly on top of an In0.8Ga0.2As channel by atomic layer deposition. The III–V heterostructure was epitaxial grown on a GaAs wafer and subsequently direct wafer bonded to a Si substrate, leading to a high-quality III–V channel formation on Si. The gate layout was optimized for millimeter-wave and submillimeter-wave integrated circuit applications using T-gates and wet chemical recess etching to minimize the parasitic gate capacitances. For a $2 \times 10 \,\,\mu \text{m}$ gate width transistor, a transit frequency $\text{f}_{\textrm {T}}$ of 200 GHz and a record maximum oscillation frequency $\text{f}_{\textrm {max}}$ of 640 GHz were extrapolated. A realized three-stage cascode amplifier circuit demonstrated a maximum gain of 21 dB at 278 GHz and a small-signal gain of more than 17 dB between 222 and 284 GHz. The total chip size of the millimeter-wave amplifier MMIC was only $0.5\,\,\times \,\,1.2$ mm2. To verify the RF performance of the III–V MOSHEMT on Si technology, all devices and circuits have been reproduced using an InGaAs MOSHEMT on GaAs technology, which has been processed simultaneously within the same wafer batch and achieved almost identical results.