Abstract
Since the complexity of a reconfigurable transmitter architecture increases with the number of variable parameters, a methodology to optimize architectures based on discrete reconfigurable matching networks (RMNs) is presented. A design with two RMNs and a stabilized power transistor is used to test the proposed algorithm. A band-reconfigurable efficiency-optimized power amplifier (PA) and a frequency-tunable driver amplifier are reported using the same topology and transistor under various bias. Referred to a fixed approach, not only the efficiency of the PA is improved (46.73% at 410 MHz and 45.72% at 600 MHz) but also the gain and the matching of the driver.
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