2/3 and 1/2 Reconfigurable Switched Capacitor DC–DC Converter With 92.9% Efficiency at 62 mW/mm2 Using Driver Amplitude Doubler

Abstract

A 2/3 and 1/2 reconfigurable switched capacitor (SC) dc–dc converter is developed for a per-core dynamic voltage scaling of many-core microprocessors. The power conversion efficiency and the output power density of the SC dc–dc converter in 2/3 mode is degraded, because full-swing and half-swing drivers for power transistors are mixed and the resistive loss of the power MOSFETs with the half-swing drivers is large. To solve the problem, a fully integrated driver amplitude doubler (DAD) is proposed. In DAD, the gate amplitude of the power MOSFETs is increased from half-swing to full-swing by generating a 1/3 input voltage sampled from a flying capacitor. In the fabricated 2.7-V input SC dc–dc converter mounting four 100-nF 0402 (0.4 mm $\boldsymbol {\times } \,\, 0.2$ mm $\boldsymbol \times0.2$ mm) multilayer ceramic chip capacitors on 180-nm CMOS die achieves the highest efficiency of 92.9% at the output power density of 62 mW/mm2 in the published step-down SC dc–dc converters.