1 µm MOSFET VLSI technology: Part VII—Metal silicide interconnection technology—A future perspective

Abstract

A major limitation of polycrystalline silicon as a gate material for VLSI applications is its limited conductivity which restricts its usefulness as an interconnection level. An alternative approach which combines a doped polycrystalline silicon layer with a high-conductivity metal silicide such as WSi <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> (polycide) is described. Such polycide layers are demonstrated to provide at least an order of magnitude improvement in interconnection resistance relative to polycrystalline silicon while maintaining the reliability of the polycrystalline silicon gate and the ability to form passivating oxide layers under typical polycrystalline silicon processing conditions.