Abstract
A CMOS divide-by-eight static frequency divider operating at 1.0 GHz and dissipating only 1.7mW at a supply voltage of 1.0 V is described. The corresponding power and power-delay products for the first stage toggle-type flipflop (T-F/F) are 0.32mW and 0.32 pJ, which are the best yet reported for any CMOS flipflop. The divider owes its high performance to 0.2 μm gate CMOS process technology and a new differential static T-F/F circuit. This divider is particularly suitable for dividing communication band frequencies in the front end of a battery-operated wireless hand-held terminal for personal communication.
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