1/$f$ Noise Reduction Using In-Pixel Chopping in CMOS Image Sensors

Abstract

In this letter, an in-pixel chopping technique to reduce the low-frequency or 1/ ${f}$ noise of the source follower (SF) transistor in an active pixel sensor (APS) is presented. The SF low-frequency noise is modulated at higher frequencies through chopping, implemented inside the pixel, and in later stage eliminated using low-pass filtering. To implement the chopping, the conventional 3T APS architecture is modified, with only one additional transistor of minimum size per pixel. Reduction in the noise also enhances the dynamic range of the image sensor. The prototype sensor, consists of a $ {128} {\times } {128}$ sized pixel array with in-pixel chopping and column-level read-out circuit, is fabricated in AMS 0.35- $ {\mu }\text{m}$ CMOS OPTO process. The pixel is laid out at the pitch of 10.5 $ {\mu }\text{m}$ with a fill-factor of 30%. To validate the proposed technique a $ {2} {\times } {2}$ pixel array is characterized. The output noise integrated in the frequency band from 1 Hz to 20 kHz is measured as 210 $ {\mu }\text{V}_{\textrm {RMS}}$ and $191~ {\mu }\text{V}_{\textrm {RMS}}$ at chopping frequency ( $ {f}_{\textrm {ch}}$ ) of 4 MHz and 8 MHz, respectively, which shows a reduction in the noise power by 13.3 and 14.2 dB, respectively.