1 Adaptive Systems in Floating-Gate CMOS Technology

Abstract

Summary form only. A challenging aspect in the design of portable electronic systems is their need to operate in environments plagued by interference, noise, and unknown input statistics. Adaptive signal processing techniques, often in the form of adaptive filters or neural networks, effectively optimize the performance of the system under these conditions by modeling the statistics of the environment as a set of internal weights and adapting their values to optimize a goal function. Despite their advantages, adaptive signal processing algorithms are hard to implement in hardware because their high computational throughput usually translates into large die area and power dissipation. For size-and power-constrained systems such as portable electronics, implementing these algorithms on digital-signal processors or even custom digital VLSI circuits is often unfeasible. Analog VLSI can implement signal-processing arithmetic in orders of magnitude less area and power than their digital counterparts, but are plagued by other problems such as charge leakage, signal offsets, device mismatch and noise sensitivity. In this talk we present an approach to building low-power adaptive signal processing systems in analog and mixed-signal VLSI. Central to our approach is the use of synapse transistors, floating-gate silicon devices which can store a nonvolatile analog weight and are free of the charge-leakage and charge-injection problems that affect VLSI capacitors. We use synapse transistors both to store synaptic weights and to compensate for arithmetic degradations introduced by offsets and device mismatch.