1.2 nJ/classification 2.4 mm2 asynchronous wired-logic DNN processor using synthesized nonlinear function blocks in 0.18 μm CMOS

Abstract

We have developed a full-digital wired-logic DNN processor that is 5.3 times smaller and 2.6 times more energy efficient than previously developed processors. Our processor is capable of inferring a MNIST classification task with 90.6% accuracy and 1.2 nJ of energy per classification at 3.89 Mfps. We also developed a neuron and synapse-saving neural network using nonlinear neural network technology to reduce the number of processing elements to be implemented. Lastly, we developed a logical compression technique for area and energy-saving neuron cell circuits. Using these techniques, we devised a digital asynchronous wired-logic DNN processor.