0.5‐V fractional‐order companding filters

Abstract

SummaryNovel configurations of fractional‐order filter topologies, realized through the employment of the concept of companding filtering, are introduced in this paper. As a first step, the design procedure is presented in a systematic algorithmic way, while in the next step, the basic building blocks of sinh‐domain and log‐domain integrators are presented. Because of the employment of metal–oxide–semiconductor (MOS) transistors operated in the subthreshold region, the derived filter structures offer the capability for operation in an ultra‐low‐voltage environment. In addition, because of the offered resistorless realizations, the proposed topologies are reconfigurable, in the sense that the order of the filter could be chosen through appropriate bias current sources. The performance of the derived fractional‐order filters has been evaluated through simulation and comparison results using the Analog Design Environment of the Cadence software and MOS transistor parameters provided by the Taiwan Semiconductor Manufacturing Company (TSMC) 180‐nm complementary MOS (CMOS) process. Copyright © 2014 John Wiley & Sons, Ltd.