Abstract
In this study, the proposed bulk-driven amplifier utilizes the bulk-driven flipped voltage follower together with the auxiliary amplifier to form the adaptive biasing input stage. The quasi-floating gate technique to build the class-AB output stage can enhance the gain-bandwidth, DC gain and slew rate of the conventional bulk-driven counterpart. Therefore, the current efficiency is improved. Simulation verification using a 0.18 μm CMOS technology, with a supply voltage of 0.8V, showed a DC gain of 76.6 dB, a CMRR of 106.6 dB, a gain-bandwidth product of 6.78 MHz and an average slew rate of 3.48 V/μs .
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