0.3V Bulk-Driven Current Conveyor

Fabian Khateb,Montree Kumngern,Tomasz Kulej

doi:10.1109/access.2019.2916897

Abstract

This paper presents the design and the experimental results of a sub 0.5 V bulk-driven (BD) current conveyor (CCII) using $0.18~\mu \text{m}$ TSMC CMOS technology with a total chip area of 0.0134 mm2. All transistors are biased in the subthreshold region for low-voltage low-power operation and the input transistors are controlled from their bulk terminals for rail-to-rail input voltage range. The circuit is designed to work with voltage supply (VDD = 0.3V), which is much lower than the threshold voltage of the MOS transistor (VTH = 0.5V) while consuming 19 nW of power. The measurement results confirm the proper function of the proposed circuit.

Highlights

Extremely low-voltage (LV) and low-power (LP) CMOS circuits have found a number of applications in contemporary portable and implantable electronic systems
In the last years several low-voltage low-power CCIIs have been presented in the literature, for instance a CCII based on bulk-driven folded cascode OTA with ± 0.4 V voltage supply and 64 μW power consumption has been presented in [7], a CCII based on floating-gate folded cascode OTA with ± 0.5 V voltage supply and 10 μW power consumption has been presented in [8], a CCII based on bulk-driven voltage follower with 0.5 V voltage supply and 30 μW power consumption has been presented in [9], a gate-driven CCII using adaptive biasing technique with ±0.75 V voltage supply and 150 nW power consumption has been presented in [10], a gate-driven subthreshold CCII with 0.4 V voltage supply and 1.8 μ W power
This paper presents a new solution for a LV/LP BD CCII that can operate from VDD of 0.3 V, while consuming only 19 nW of power and offering a rail-to-rail signal swing at the same time

Summary

Introduction

Low-voltage (LV) and low-power (LP) CMOS circuits have found a number of applications in contemporary portable and implantable electronic systems. BULK-DRIVEN CCII The proposed positive CCII, as shown, is based on two outputs op-amp operating in unity-gain feedback configuration that ensure VY = VX and IZ = IX . Without this connection the internal op-amp would have poor CMRR performance, which would affect the accuracy of the voltage gain of the resulting voltage follower, causing its value to be greater than unity.

Results

Conclusion