0.18-μm fully-depleted silicon-on-insulator MOSFET's

Abstract

High-performance 0.18-/spl mu/m gate-length fully depleted silicon-on-insulator (FD-SOI) MOSFET's were fabricated using 4-nm gate oxide, 35-nm thick channel, and 80-nm or 150-nm buried oxide layer. An elevated source/drain structure was used to provide extra silicon during silicide formation, resulting in low source/drain series resistance. Nominal device drive currents of 560 /spl mu/A//spl mu/m and 340 /spl mu/A//spl mu/m were achieved for n-channel and p-channel devices, respectively, at a supply voltage of 1.8 V. Improved short-channel performance and reduced self-heating were observed for devices with thinner buried oxide layers.