缺陷捕捉與照光對具氧化鉿/二氧化矽介電層 金氧半結構電容-電壓特性之影響

Abstract

In this work, the electrical properties of high-k gate dielectric (HfO2) prepared under different process temperatures are investigated. Ultra-thin SiO2 layer was prepared by anodization in D. I. water at room temperature for initial buffer layer. The sputtered hafnium films was oxidized by diluted nitric acid (HNO3) followed by 380℃ annealing in N2. The equivalent oxide thickness (EOT) of HfO2/SiO2 gate dielectric is 2.3 nm and the effective dielectric constant is 20. The gate leakage current of this HfO2 gate dielectric is two orders smaller than that of SiO2 dielectric with the same EOT. The frequency dispersion of C-V curves are simulated and discussed in detailed. As for the SiO2 and HfO2 quality, the traps (Ctrap) between SiO2 and HfO2 obtained by high-low-frequency calculation are found. These simulation results show that HfO2/SiO2 with different qualities may introduce different frequency dispersions in C-V curves. Also, the C-V and J-V characteristics of MOS structures with HfO2/SiO2 gate dielectrics are investigated under illumination. The C-V curves are deformed and exhibited two peaks in depletion and inversion regions under illumination, which are caused by Dit and excess carriers. The J-V curves are saturated at inversion region and the saturated current is proportional to the device perimeter. But in accumulation, the current was proportional to the area. The onset voltage of saturation current is corresponding to the cut off voltage, which is dependent on dielectrics quality.