Abstract
The electrical characteristics and annealing effects of tunneling dielectrics stacked with and were investigated. I-V characteristics of band gap engineered tunneling gate stacks consisted of (NON), (ONO) dielectrics were evaluated and compared with single layer using the MOS (metal-oxide-semiconductor) capacitor structure. The leakage currents of engineered tunneling barriers (ONO, NON stacks) are lower than that of the conventional single layer at low electrical field. Meanwhile, the engineered tunneling barriers have larger tunneling current at high electrical field. Furthermore, the increased tunneling current through engineered tunneling barriers related to high speed operation can be achieved by annealing processes.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callMore From: Journal of the Korean Institute of Electrical and Electronic Material Engineers
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
