Abstract
The paper analyzes the implementation properties of unit codes as alternatives to classical binary ones. The possibility of forming a logical-temporal code, which is a symbiosis of two known unit codes: a unit normal and a unit positional (marking) code, is shown. This allows you to provide accelerated principle of recording information and less energy-intensive while storing it. Analytical expressions for calculation of hardware and time expenses at concrete realization of unit data encoding on the shift register and the binary counter with the decoder are resulted. It is the lack of decryption of the generated data that requires increasing the number of connections in the schemes in times. The widespread use of FPGAs eliminates this problem with the compact placement of unit-coded devices in the FPGA chip. This makes it possible to use unit codes as an alternative to binary codes in data transmission, as well as in some types of control devices when encoding their states and in storage devices when addressing their contents. As an example, the efficiency of using unit codes for encoding the states of microprogram automata is shown, which is achieved by the low complexity of combinational circuits and the absence of the need to decode the code combinations of automaton states.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.