Abstract
A 1/4-inch format 250k pixel amplified MOS image sensor has been developed with the CMOS process. We developed a new circuit technique that uses a 0.8μm design rule to reduce pixel size while attaining vertical two line mixing and high sensitivity. Considering high speed operation and stacking photoconversion layers, we have designed scanner circuits and determined photodiode potential. As a result, a dynamic range of 75 dB and a sensitivity of 1.8μA/lx have been attained for a pixel size of 7.2 (H) × 5.6 (V) μm2. Fixed pattern noise is-55dB for saturation current, additional smear is under 2.5 × 10-6, and lag is under 1% on first field. We also confirmed high-speed operation up to a HDTV data rate.
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