Abstract
박형 package-on-package의 상부 패키지에 대하여 PCB 기판, 칩본딩 및 에폭시 몰딩과 같은 공정단계 진행에 따른 warpage 특성을 분석하였다. <TEX>$100{\mu}m$</TEX> 두께의 박형 PCB 기판 자체에서 <TEX>$136{\sim}214{\mu}m$</TEX> 범위의 warpage가 발생하였다. 이와 같은 PCB 기판에 <TEX>$40{\mu}m$</TEX> 두께의 박형 Si 칩을 die attach film을 사용하여 실장한 시편은 PCB 기판의 warpage와 유사한 <TEX>$89{\sim}194{\mu}m$</TEX>의 warpage를 나타내었으나, 플립칩 공정으로 Si 칩을 PCB 기판에 실장한 시편은 PCB 기판과 큰 차이를 보이는 <TEX>$-199{\sim}691{\mu}m$</TEX>의 warpage를 나타내었다. 에폭시 몰딩한 패키지의 경우에는 DAF 실장한 시편은 <TEX>$-79{\sim}202{\mu}m$</TEX>, 플립칩 실장한 시편은 <TEX>$-117{\sim}159{\mu}m$</TEX>의 warpage를 나타내었다. Warpage of top packages to form thin package-on-packages was measured with progress of their process steps such as PCB substrate itself, chip bonding, and epoxy molding. The <TEX>$100{\mu}m$</TEX>-thick PCB substrate exhibited a warpage of <TEX>$136{\sim}214{\mu}m$</TEX>. The specimen formed by mounting a <TEX>$40{\mu}m$</TEX>-thick Si chip to such a PCB using a die attach film exhibited the warpage of <TEX>$89{\sim}194{\mu}m$</TEX>, which was similar to that of the PCB itself. On the other hand, the specimen fabricated by flip chip bonding of a <TEX>$40{\mu}m$</TEX>-thick chip to such a PCB possessed the warpage of <TEX>$-199{\sim}691{\mu}m$</TEX>, which was significantly different from the warpage of the PCB. After epoxy molding, the specimens processed by die attach bonding and flip chip bonding exhibited warpages of <TEX>$-79{\sim}202{\mu}m$</TEX> and <TEX>$-117{\sim}159{\mu}m$</TEX>, respectively.
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More From: Journal of the Microelectronics and Packaging Society
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