Abstract

Modern computationally intensive tasks of mathematical physics require continuous increasingof the performance of computer equipment used for their highly efficient solution. However,at present, the development of their electronic components is slowing down due to limitationsof technological production and operational processes. One of the ways to overcome the computerproductivity growth crisis is the development of digital photonic computers (DPC). In the paperwe suggest a promising DPC architecture, which consists of a functional subsystem, data streamsynchronization and switching subsystems, and photonic-electronic interfaces of data exchangewith external devices. We describe the principles of each subsystem. The functional subsystem is aset of DPC devices that provide 64-bit floating point arithmetic logic operations (according to theIEEE754 standard), implemented as linear pipelines with processing of least significant bits forward.The synchronization subsystem provides a single rate of data flow among various functionaldevices of the DPC, combined into a computing structure. According to the topology of the computingstructure, the switching subsystem controls the data streams at the stage of DPC programmingor during processing according to conditional transitions. For data exchange between theDPC and external devices, we suggest the technology of serialization of low-frequency parallelchannels and deserialization of high-frequency serial channels. We give a theoretical evaluation of the performance of the computing structures implemented on the DPC, which is similar to thestructures of mathematical physics problems concerning processing of special matrices. We showthat DPCs, due to their clock frequency, can provide the performance that exceeds the performanceof microelectronic devices by two and more orders of magnitude.

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