ЛОГИЧЕСКАЯ ЯЧЕЙКА ДЛЯ СБИС НА ОСНОВЕ ПОЛЕВЫХ ТРАНЗИСТОРОВ С P-N-ПЕРЕХОДАМИ

Abstract

In the 80s of the last century, integrated injection logic (I2L) was widely used as an elementbase. Somewhat later, injection-field logic (IPL) appeared in the development of I2L capabilitiesfor building VLSI. Thanks to the use of a field-effect transistor as a key element of the inverter, inthis element basis it was possible to significantly reduce an important indicator for VLSI – powerconsumption - reaching the peak-watt range. An even greater reduction in power consumption canbe achieved by using two field-effect transistors in the inverter unit cell, which is proposed in thispaper. This element basis is proposed to be called field-field logic, or in the future P2L. To reducethe dimensions of the P2L cell, field-effect transistors, both key and load, are made with a verticalchannel. In addition, to ensure a positive supply voltage, an n-channel transistor is used as a keyone, and a p–channel transistor is used as a load one. Both transistors are normally closed, i.e.closed at zero gate voltage. Topological variants of P2L-cell execution from geometry with annulargates to geometry with linear gates proposed by the author earlier are considered. The topologicalnorms adopted in the consideration are the norms of 50 nm. The power consumption in thiselement basis is reduced by about two times compared to the IPL, due to the fact that the currentflows through the load transistors in the inverter chain through one inverter, as well as throughthe key ones. The technological process of manufacturing a P2L cell is considered, the profiles ofthe distribution of impurities in depth are calculated. The manufacturing process is designed takinginto account the fact that the load p-channel transistor must be made in an insulated pocketusing full dielectric insulation technology. The technological modes of manufacturing the P2L cellare given. The proposed design and technological variant of the P2L cell can be recommended forthe creation of VLSI with low power consumption.