ОСОБЕННОСТИ СХЕМОТЕХНИКИ ОПЕРАЦИОННЫХ УСИЛИТЕЛЕЙ НА КОМПЛЕМЕНТАРНЫХ ПОЛЕВЫХ ТРАНЗИСТОРАХ С УПРАВЛЯЮЩИМ PN-ПЕРЕХОДОМ

Abstract

The systematic component of the offset voltage (Voff) of two-stage BJT and CMOS operationalamplifiers (Op-Amps) with classical architecture significantly depends on the numericalvalues (difference from unity) of the current transfer coefficient (Ki≈1) of the current mirrors (CM)used. This parameter of CM is also influenced by the Earley stress of their dominant active components.Current JFET mirrors are today a weak link in modern JFET analog circuitry and theyare impractical to use in the structure of JFET Op-Amps. The article posed and solved the problemof the conditions for the elimination of CM in an Op-Amps based on field-effect transistorswith a control pn-junction for the case when it is necessary to obtain a small Voff. Variants of practicalcircuits of input (InS) and intermediate (IntS) stages of microelectronic operational amplifiersbased on complementary field-effect transistors with a control pn-junction (CJFET) are proposed.Their main feature is the absence of a current mirror, which, when implemented on aCJFET, negatively affects the main parameters of the Op-Amps in terms of the systematic componentof the offset voltage, the attenuation coefficients of the input common-mode signal, and thesuppression of noise on the power buses. In this regard, InSs and IntSs circuits are promising,which do not use this CJFET functional unit. The circuits of Op-Amps based on the developed InSswith an open gain of more than 80 dB and a systematic component of the offset voltage within 300μV with low current consumption in a static mode are presented. The relevance of the performedstudies lies in the need to develop the theory of designing high-precision JFET and CJFET IPmodulesfor use in structures of low-noise analog interfaces of sensors of various physical quantities,including those operating in severe operating conditions (exposure to low temperatures andradiation) The proposed circuits can be implemented on wide-gap semiconductors (SiC JFET,GaN JFET or GaAs JFET).