Graphics Processing Unit Implementation Research Articles

Parallel Algorithm on Multicore Processor and Graphics Processing Unit for the Optimization of Electric Vehicle Recharge Scheduling

Parallel Algorithm on Multicore Processor and Graphics Processing Unit for the Optimization of Electric Vehicle Recharge Scheduling

Efficient computation of the geopotential gradient in graphic processing units

Efficient computation of the geopotential gradient is essential for numerical propagators, particularly in scenarios involving low Earth orbits. Conventional geopotential calculations are based on spherical harmonics series, which become computationally demanding as the degree/order increases. This computational burden can be mitigated by means of parallelized algorithms. Additionally, certain situations lend themselves to high parallelization, such as the propagation of space debris catalogs, satellite mega-constellations, or the dispersion of particles resulting from a space collision event. This paper introduces an optimized Graphics Processing Unit (GPU) implementation designed to facilitate extensive parallelization in the geopotential gradient calculation. The formulation developed in this study is not specific to any GPU. However, to illustrate the low-level optimizations necessary for an efficient implementation, we selected the Compute Unified Device Architecture (CUDA) as the dominant and de facto standard in parallel computing. Nevertheless, most of the concepts and optimizations presented in this paper are also valid for other GPU architectures. Built upon the spherical harmonic expansion using the Cunningham formulation, which is well-suited for GPU computations, our implementation offers several variants with different tradeoffs between speed and accuracy. Besides GPU double precision, we introduced a mixed precision arithmetic –a hybrid between single and double precision– that exploits GPU capabilities with a low penalty in accuracy. The proposed algorithm was implemented as a software reusable module, and its performance was evaluated against GMAT, GODOT, and Orekit astrodynamic codes. The algorithm’s accuracy in double precision is comparable to such codes. The mixed precision version showed enough accuracy for LEO satellite propagation, with around 1 m difference in four days. Testing across different CUDA architectures revealed very high speed-up factors compared to a single CPU, reaching a speed-up of 645 for the mixed precision variant and 450 for the double precision one in the propagation of about 3200 objects with a geopotential of degree/order 126×126 using an A100 GPU device.

ACCELERATING ORE SINTERING MATHEMATICAL MODEL USING GPU

The study aims to enhance the efficiency and computational speed of the ore sintering model through the utilization of graphics processing units (GPUs). The purpose of this research is to address the growing demand for faster and more scalable simulations in the field of ore sintering, a crucial process in the production of iron and steel. Methodology involves the integration of parallel computing capabilities offered by GPUs into the existing ore sintering model. By leveraging the parallel processing power of GPUs, the computational workload is distributed across multiple cores, significantly reducing the simulation time. Results demonstrate a substantial acceleration in the ore sintering simulation process. Comparative analyses between CPU and GPU implementations reveal a remarkable reduction in computation time, thereby enabling real-time or near-real-time simulations. The achieved speedup not only enhances the efficiency of ore sintering modeling but also opens avenues for exploring larger and more complex scenarios. This is the successful integration of GPU parallel computing into the ore sintering model, showcasing the adaptability of advanced computational technologies to traditional industrial processes. The study contributes to the field by bridging the gap between computational power and metallurgical simulations, demonstrating the potential for GPU acceleration in other areas of metallurgical processes. Practical significance of this research is underscored by its potential to revolutionize the ore sintering industry. Faster simulations facilitate quicker decision-making in process optimization, leading to improved energy efficiency and reduced environmental impact. This research sets the stage for the broader adoption of GPU acceleration in metallurgical modeling, signaling a paradigm shift towards more efficient and sustainable industrial practices

Vast Parameter Space Exploration of the Virtual Brain: A Modular Framework for Accelerating the Multi-Scale Simulation of Human Brain Dynamics

Global neural dynamics emerge from multi-scale brain structures, with nodes dynamically communicating to form transient ensembles that may represent neural information. Neural activity can be measured empirically at scales spanning proteins and subcellular domains to neuronal assemblies or whole-brain networks connected through tracts, but it has remained challenging to bridge knowledge between empirically tractable scales. Multi-scale models of brain function have begun to directly link the emergence of global brain dynamics in conscious and unconscious brain states with microscopic changes at the level of cells. In particular, adaptive exponential integrate-and-fire (AdEx) mean-field models representing statistical properties of local populations of neurons have been connected following human tractography data to represent multi-scale neural phenomena in simulations using The Virtual Brain (TVB). While mean-field models can be run on personal computers for short simulations, or in parallel on high-performance computing (HPC) architectures for longer simulations and parameter scans, the computational burden remains red heavy and vast areas of the parameter space remain unexplored. In this work, we report that our HPC framework, a modular set of methods used here to implement the TVB-AdEx model for the graphics processing unit (GPU) and analyze emergent dynamics, notably accelerates simulations and substantially reduces computational resource requirements. The framework preserves the stability and robustness of the TVB-AdEx model, thus facilitating a finer-resolution exploration of vast parameter spaces as well as longer simulations that were previously near impossible to perform. Comparing our GPU implementations of the TVB-AdEx framework with previous implementations using central processing units (CPUs), we first show correspondence of the resulting simulated time-series data from GPU and CPU instantiations. Next, the similarity of parameter combinations, giving rise to patterns of functional connectivity, between brain regions is demonstrated. By varying global coupling together with spike-frequency adaptation, we next replicate previous results indicating inter-dependence of these parameters in inducing transitions between dynamics associated with conscious and unconscious brain states. Upon further exploring parameter space, we report a nonlinear interplay between the spike-frequency adaptation and subthreshold adaptation, as well as previously unappreciated interactions between the global coupling, adaptation, and propagation velocity of action potentials along the human connectome. Given that simulation and analysis toolkits are made public as open-source packages, this framework serves as a template onto which other models can be easily scripted. Further, personalized data-sets can be used for for the creation of red virtual brain twins toward facilitating more precise approaches to the study of epilepsy, sleep, anesthesia, and disorders of consciousness. These results thus represent potentially impactful, publicly available methods for simulating and analyzing human brain states.

Accelerating flash flood simulations: An efficient GPU implementation for a slim shallow water solver

Flash floods are an increasing hazard to human infrastructure and life. Effective disaster management and mitigation require accurate and fast predictions for decision-making. The Flood Inundation Parallel Computation (FIP) software presented in this paper shows how to fully exploit the tremendous computational capabilities of graphics processing units (GPUs) to accelerate shallow water solvers beyond the current state-of-the-art. The time efficient explicit shallow water scheme for structured grids RMG, is introduced and implemented in FIP. The optimized GPU implementation of FIP achieves balanced memory- and instruction throughputs of up to 80%. Validation and performance tests using laboratory and historical flood cases are presented that demonstrate the accuracy and effectiveness of FIP in predicting flood inundation. Our implementation achieves a fourfold speedup in comparison to state-of-the-art approaches. It enables faster-than real-time simulations of areas of over 600 km2 at 1 m resolution on consumer-grade GPUs.

Efficient GPU implementation of randomized SVD and its applications

Matrix decompositions are ubiquitous in machine learning, including applications in dimensionality reduction, data compression and deep learning algorithms. Typical solutions for matrix decompositions have polynomial complexity which significantly increases their computational cost and time. In this work, we leverage efficient processing operations that can be run in parallel on modern Graphical Processing Units (GPUs), predominant computing architecture used e.g. in deep learning, to reduce the computational burden of computing matrix decompositions. More specifically, we reformulate the randomized decomposition problem to incorporate fast matrix multiplication operations (BLAS-3) as building blocks. We show that this formulation, combined with fast random number generators, allows to fully exploit the potential of parallel processing implemented in GPUs. Our extensive evaluation confirms the superiority of this approach over the competing methods and we release the results of this research as a part of the official CUDA implementation.11https://docs.nvidia.com/cuda/cusolver/index.html.

Secure Genomic String Search with Parallel Homomorphic Encryption

Fully homomorphic encryption (FHE) cryptographic systems enable limitless computations over encrypted data, providing solutions to many of today’s data security problems. While effective FHE platforms can address modern data security concerns in unsecure environments, the extended execution time for these platforms hinders their broader application. This project aims to enhance FHE systems through an efficient parallel framework, specifically building upon the existing torus FHE (TFHE) system chillotti2016faster. The TFHE system was chosen for its superior bootstrapping computations and precise results for countless Boolean gate evaluations, such as AND and XOR. Our first approach was to expand upon the gate operations within the current system, shifting towards algebraic circuits, and using graphics processing units (GPUs) to manage cryptographic operations in parallel. Then, we implemented this GPU-parallel FHE framework into a needed genomic data operation, specifically string search. We utilized popular string distance metrics (hamming distance, edit distance, set maximal matches) to ascertain the disparities between multiple genomic sequences in a secure context with all data and operations occurring under encryption. Our experimental data revealed that our GPU implementation vastly outperforms the former method, providing a 20-fold speedup for any 32-bit Boolean operation and a 14.5-fold increase for multiplications.This paper introduces unique enhancements to existing FHE cryptographic systems using GPUs and additional algorithms to quicken fundamental computations. Looking ahead, the presented framework can be further developed to accommodate more complex, real-world applications.

Development of GPU‐based matrix‐free strategies for large‐scale elastoplasticity analysis using conjugate gradient solver

AbstractIn recent years, matrix‐free conjugate gradient (CG) solvers with graphics processing unit (GPU) acceleration have been effectively used to reduce the execution timings of finite element method (FEM)‐based engineering simulations. However, there is not much in the literature that discusses the application of matrix‐free CG solvers for elastoplasticity. The primary challenge is the presence of both elastic and plastic states, which introduce branching issues in the parallel computation of sparse matrix‐vector multiplication (SpMV). The current work proposes an efficient split kernel strategy for elastoplasticity that segregates elements in elastic and plastic zones and allows the application of standard GPU‐based matrix‐free SpMV strategies in the literature to elastoplastic simulation. The proposed strategy avoids branching issues, facilitates coalesced memory access, allows efficient usage of on‐chip memory, and uses minimum storage to realize large‐scale simulation on a GPU with limited memory. We also propose matrix‐free SpMV strategies for GPU implementation based on an element‐by‐element technique that makes efficient use of memory hierarchy available in a GPU. The computational efficiency of the proposed strategies is demonstrated over three large‐scale benchmark examples from elastoplasticity, and the performance results are compared with GPU optimized node‐based and degrees of freedom (DOF)‐based matrix‐free strategies. The results show that the splitting of computation is most suitable for low plasticity problems, where most of the matrix‐free strategies show significant speedups with respect to single kernel strategy for elastoplasticity. The proposed element‐by‐element strategy using node‐wise thread allocation is found to have the best performance, achieving up to 7.16 and 3.35 speedup over node‐based and DOF‐based strategy, respectively. For problems with higher amounts of plasticity, the proposed strategies perform slightly better and achieve modest speedups due to advantages in the initial stages of Newton iterations. In terms of wall‐clock timings, the proposed matrix‐free solver is found to be up to 2 faster than GPU optimized assembly‐based elastoplasticity solver.

GPU-accelerated non-dominated sorting genetic algorithm III for maximizing protein production

<abstract><p>Maximizing protein expression levels poses a major challenge in bioengineering. To increase protein expression levels, numerous factors, including codon bias, codon context bias, hidden stop codons, homologous recombination, suitable guanine-cytosine ratio, and hairpin loop structure, are crucial and quantified by six objective functions: CAI, CPB, HSC, HD, GC3, and SL. Optimizing these six objectives simultaneously constitutes a multi-objective optimization problem, aiming to identify the favorable Pareto solutions rather than a singular optimal solution. However, achieving satisfactory solutions requires numerous cycles and solutions, thus leading to a large number of functional evaluations. While there are frameworks for multi-objective optimization problems, they often lack efficient support for objective function computation in protein encoding. In this paper, we proposed a method to design a set of coding sequences (CDSs) based on non-dominated sorting genetic algorithm III (NSGA-III), accelerated using NVIDIA graphical processing units (GPUs). Experimental results indicated that our method is 15,454 times faster than the Pymoo framework and is evaluated using 100 solutions and 100 cycles. Since our GPU implementation facilitated the use of larger solutions and more cycles, we were able to design a superior set of CDSs by increasing solutions to 400 and cycles to 12,800. In addition, our NSGA-III-based method consistently surpassed the NSGA-II approach when the number of cycles exceeded 3200 by utilizing 100 solutions. Finally, we observed that a gradual reduction of the mutation probability as the number of cycles increased yielded better quality results than maintaining a fixed mutation probability.</p></abstract>

GPU versus FPGA implementation of a digital predistortion linearizer for wideband radiofrequency power amplifiers

This paper presents and compares the implementation of a digital predistortion (DPD) linearizer for radiofrequency power amplifiers (PAs) considering two different hardware acceleration platforms. Both graphics processing unit (GPU)-based and field programmable gate arrays (FPGA)-based implementations of the DPD are capable to meet the high throughput requirements for linearizing the PA with current 5G new radio (NR) wideband signals. A comparison in terms of hardware resources usage, precision, throughput and linearization performance is provided for both GPU and FPGA implementations of a DPD based on the generalized memory polynomial (GMP) behavioral model.

Feature Extraction in Time-Lapse Seismic Using Deep Learning for Data Assimilation

Summary Assimilation of time-lapse (4D) seismic data with ensemble-based methods is challenging because of the massive number of data points. This situation requires excessive computational time and memory usage during the model updating step. We addressed this problem using a deep convolutional autoencoder to extract the relevant features of 4D images and generate a reduced representation of the data. The architecture of the autoencoder is based on the VGG-19 network, a deep convolutional architecture with 19 layers well-known for its effectiveness in image classification and object recognition. Some advantages of VGG-19 are the possibility of using some pretrained convolutional layers to create a feature extractor and taking advantage of the transfer learning technique to address other related problem domains. Using a pretrained model bypasses the need for large training data sets and avoids the high computational demand to train a deep network. For further improvements in the reconstruction of the seismic images, we apply a fine-tuning of the weights of the latent convolutional layer. We propose to use a fully convolutional architecture, which allows the application of distance-based localization during data assimilation with the ensemble smoother with multiple data assimilation (ES-MDA). The performance of the proposed method is investigated in a synthetic benchmark problem with realistic settings. We evaluate the methodology with three variants of the autoencoder, each one with a different level of data reduction. The experiments indicate that it is possible to use latent representations with major data reductions without impairing the quality of the data assimilation. Additionally, we compare central processing unit (CPU) and graphics processing unit (GPU) implementations of the ES-MDA update step and show in another synthetic problem that the reduction in the number of data points obtained with the application of the deep autoencoder may provide a substantial improvement in the overall computation cost of the data assimilation for large reservoir models.

WFA-GPU: gap-affine pairwise read-alignment using GPUs.

Advances in genomics and sequencing technologies demand faster and more scalable analysis methods that can process longer sequences with higher accuracy. However, classical pairwise alignment methods, based on dynamic programming (DP), impose impractical computational requirements to align long and noisy sequences like those produced by PacBio and Nanopore technologies. The recently proposed wavefront alignment (WFA) algorithm paves the way for more efficient alignment tools, improving time and memory complexity over previous methods. However, high-performance computing (HPC) platforms require efficient parallel algorithms and tools to exploit the computing resources available on modern accelerator-based architectures. This paper presents WFA-GPU, a GPU (graphics processing unit)-accelerated tool to compute exact gap-affine alignments based on the WFA algorithm. We present the algorithmic adaptations and performance optimizations that allow exploiting the massively parallel capabilities of modern GPU devices to accelerate the alignment computations. In particular, we propose a CPU-GPU co-design capable of performing inter-sequence and intra-sequence parallel sequence alignment, combining a succinct WFA-data representation with an efficient GPU implementation. As a result, we demonstrate that our implementation outperforms the original multi-threaded WFA implementation by up to 4.3× and up to 18.2× when using heuristic methods on long and noisy sequences. Compared to other state-of-the-art tools and libraries, the WFA-GPU is up to 29× faster than other GPU implementations and up to four orders of magnitude faster than other CPU implementations. Furthermore, WFA-GPU is the only GPU solution capable of correctly aligning long reads using a commodity GPU. WFA-GPU code and documentation are publicly available at https://github.com/quim0/WFA-GPU.

Fast grid to grid interpolation for radio interferometric imaging

Backward and forward interpolations on a Fourier grid are computationally expensive operations for radio interferometric imaging algorithms. By merging these operations, we propose the Grid to Grid (G2G) method which aims to reduce the computational cost and memory footprint. We have also shown that the oversampling factor used for the convolution function in the G2G method strongly impacted the accuracy and computational speed. Acceleration on graphics processing units (GPU), well suited for this embarrassingly parallel algorithm, has been studied mainly for backward operation. Thus, we propose a GPU and CPU implementation of the G2G method on Nvidia A100 and Intel Ice Lake processors. Experiments have shown a GPU performance improvement with a Fourier-point throughput better than up to 37% regarding standard gridder and degridder.

Fast Gap-Filling of Massive Data by Local-Equilibrium Conditional Simulations on GPU

AbstractThe ever-growing size of modern space–time data sets, such as those collected by remote sensing, requires new techniques for their efficient and automated processing, including gap-filling of missing values. Compute Unified Device Architecture-based parallelization on graphics processing units (GPUs) has become a popular way to dramatically increase the computational efficiency of various approaches. Recently, a computationally efficient and competitive yet simple spatial prediction approach inspired by statistical physics models, called the modified planar rotator method, was proposed. Its GPU implementation allowed additional impressive computational acceleration exceeding two orders of magnitude in comparison with central processing unit calculations. In the current study, a rather general approach to modeling spatial heterogeneity in GPU-implemented spatial prediction methods for two-dimensional gridded data is proposed by introducing spatial variability to model parameters. Predictions of unknown values are obtained from non-equilibrium conditional simulations, assuming “local” equilibrium conditions. It is demonstrated that the proposed method leads to significant improvements in both prediction performance and computational efficiency.

Slightly Off-Axis Digital Holography Using a Transmission Grating and GPU-Accelerated Parallel Phase Reconstruction

Slightly off-axis digital holography is proposed using transmission grating to obtain quantitative phase distribution. The experimental device is based on an improved 4f optical system in which a two-window input plane is used to form the object beam and reference beam. Then, the two beams are diffracted into multiple orders by the transmission grating placed at the Fourier plane. By applying a modified Michelson configuration, the interference patterns can be generated by the object and reference beams from different diffraction orders. After translating the grating, a random phase shift can be introduced to the hologram. To demonstrate the feasibility of our method, both thick and thin phase specimens are retrieved using two carrier phase-shifting holograms. Furthermore, we use the phase reconstruction algorithm based on the NVIDIA CUDA programming model to reduce the retrieval time. Meanwhile, we optimize the discrete cosine transform (DCT)-based least-squares unwrapping algorithm to unwrap the phase. By porting the entire phase reconstruction process to the graphics processing unit (GPU), the phase retrieval acceleration and execution efficiency significantly improve. To demonstrate the feasibility of our method, it is found that our method can measure the surface profiles of standard elements, such as a plano-convex cylinder lens and a microlens array, with a relative error of about 0.5%. For holograms with a different phase shift, the root-mean-square (RMS) value of the phase difference for the main imaging region is about 0.2 rad. By accelerating the phase reconstruction with GPU implementation, a speedup ratio of about 20× for the thick phase specimen and a speedup ratio of about 15× for the thin-phase specimen can be obtained for holograms with a pixel size of 1024 × 1024.

High-Performance Acceleration of 2-D and 3-D CNNs on FPGAs Using Static Block Floating Point.

Over the past few years, 2-D convolutional neural networks (CNNs) have demonstrated their great success in a wide range of 2-D computer vision applications, such as image classification and object detection. At the same time, 3-D CNNs, as a variant of 2-D CNNs, have shown their excellent ability to analyze 3-D data, such as video and geometric data. However, the heavy algorithmic complexity of 2-D and 3-D CNNs imposes a substantial overhead over the speed of these networks, which limits their deployment in real-life applications. Although various domain-specific accelerators have been proposed to address this challenge, most of them only focus on accelerating 2-D CNNs, without considering their computational efficiency on 3-D CNNs. In this article, we propose a unified hardware architecture to accelerate both 2-D and 3-D CNNs with high hardware efficiency. Our experiments demonstrate that the proposed accelerator can achieve up to 92.4% and 85.2% multiply-accumulate efficiency on 2-D and 3-D CNNs, respectively. To improve the hardware performance, we propose a hardware-friendly quantization approach called static block floating point (BFP), which eliminates the frequent representation conversions required in traditional dynamic BFP arithmetic. Comparing with the integer linear quantization using zero-point, the static BFP quantization can decrease the logic resource consumption of the convolutional kernel design by nearly 50% on a field-programmable gate array (FPGA). Without time-consuming retraining, the proposed static BFP quantization is able to quantize the precision to 8-bit mantissa with negligible accuracy loss. As different CNNs on our reconfigurable system require different hardware and software parameters to achieve optimal hardware performance and accuracy, we also propose an automatic tool for parameter optimization. Based on our hardware design and optimization, we demonstrate that the proposed accelerator can achieve 3.8-5.6 times higher energy efficiency than graphics processing unit (GPU) implementation. Comparing with the state-of-the-art FPGA-based accelerators, our design achieves higher generality and up to 1.4-2.2 times higher resource efficiency on both 2-D and 3-D CNNs.

Accelerating 4D image reconstruction for magnetic resonance-guided radiotherapy.

Physiological motion impacts the dose delivered to tumours and vital organs in external beam radiotherapy and particularly in particle therapy. The excellent soft-tissue demarcation of 4D magnetic resonance imaging (4D-MRI) could inform on intra-fractional motion, but long image reconstruction times hinder its use in online treatment adaptation. Here we employ techniques from high-performance computing to reduce 4D-MRI reconstruction times below two minutes to facilitate their use in MR-guided radiotherapy. Four patients with pancreatic adenocarcinoma were scanned with a radial stack-of-stars gradient echo sequence on a 1.5T MR-Linac. Fast parallelised open-source implementations of the extra-dimensional golden-angle radial sparse parallel algorithm were developed for central processing unit (CPU) and graphics processing unit (GPU) architectures. We assessed the impact of architecture, oversampling and respiratory binning strategy on 4D-MRI reconstruction time and compared images using the structural similarity (SSIM) index against a MATLAB reference implementation. Scaling and bottlenecks for the different architectures were studied using multi-GPU systems. All reconstructed 4D-MRI were identical to the reference implementation (SSIM 0.99). Images reconstructed with overlapping respiratory bins were sharper at the cost of longer reconstruction times. The CPU +GPU implementation was over 17 times faster than the reference implementation, reconstructing images in 60 1 s and hyper-scaled using multiple GPUs. Respiratory-resolved 4D-MRI reconstruction times can be reduced using high-performance computing methods for online workflows in MR-guided radiotherapy with potential applications in particle therapy.

Fixed-point FPGA Implementation of the FFT Accumulation Method for Real-time Cyclostationary Analysis

The spectral correlation density (SCD) is an important tool in cyclostationary signal detection and classification. Even using efficient techniques based on the fast Fourier transform (FFT), real-time implementations are challenging because of the high computational complexity. A key dimension for computational optimization lies in minimizing the wordlength employed. In this article, we analyze the relationship between wordlength and signal-to-quantization noise in fixed-point implementations of the SCD function. A canonical SCD estimation algorithm, the FFT accumulation method (FAM) using fixed-point arithmetic, is studied. We derive closed-form expressions for SQNR and compare them at wordlengths ranging from 14 to 26 bits. The differences between the calculated SQNR and bit-exact simulations are less than 1 dB. Furthermore, an HLS-based FPGA design is implemented on a Xilinx Zynq UltraScale+ XCZU28DR-2FFVG1517E RFSoC. Using less than 25% of the logic fabric on the device, it consumes 7.7 W total on-chip power and has a power efficiency of 12.4 GOPS/W, which is an order of magnitude improvement over an Nvidia Tesla K40 graphics processing unit (GPU) implementation. In terms of throughput, it achieves 50 MS/sec, which is a speedup of 1.6 over a recent optimized FPGA implementation.

GPU-based mesh reduction strategy utilizing active nodes for structural topology optimization

This paper presents a novel mesh reduction strategy on graphics processing unit (GPU) that aims to reduce the computational complexity of conventional structural topology optimization. In the proposed strategy, the effective number of design variables is reduced by using the concept of active nodes and active elements in the finite element mesh. A novel mesh numbering scheme is also introduced to facilitate parallel identification of active nodes using a proposed GPU-based algorithm. The preconditioned conjugate gradient (PCG) solver is further developed using the proposed strategy and the numbering scheme. The proposed strategy is tested on three structural topology optimization problems using solid isotropic material with penalization method. Results of the proposed strategy demonstrate up to 8× speedup over the standard GPU implementation considering the entire mesh.

Non-stationary wave relaxation methods for general linear systems of Volterra equations: convergence and parallel GPU implementation

In the present paper, a parallel-in-time discretization of linear systems of Volterra equations of type u¯(t)=u¯0+∫0tK(t-s)u¯(s)ds+f¯(t),0<t≤T,\\documentclass[12pt]{minimal} \\usepackage{amsmath} \\usepackage{wasysym} \\usepackage{amsfonts} \\usepackage{amssymb} \\usepackage{amsbsy} \\usepackage{mathrsfs} \\usepackage{upgreek} \\setlength{\\oddsidemargin}{-69pt} \\begin{document}$$\\begin{aligned} \\bar{u}(t) = \\bar{u}_0 + \\int _0^t \ extbf{K}(t-s) \\bar{u}(s)\\,\ ext{ d }s + \\bar{f}(t),\\qquad 0<t\\le T, \\end{aligned}$$\\end{document}is addressed. Related to the analytical solution, a general enough functional setting is firstly stated. Related to the numerical solution, a parallel numerical scheme based on the Non-Stationary Wave Relaxation (NSWR) method for the time discretization is proposed, and its convergence is studied as well. A CUDA parallel implementation of the method is carried out in order to exploit Graphics Processing Units (GPUs), which are nowadays widely employed for reducing the computational time of several general purpose applications. The performance of these methods is compared to some sequential implementation. It is revealed throughout several experiments of special interest in practical applications the good performance of the parallel approach.