Introduction Joint bleeding is still a challenging complication of hemophilia. Distinguishing between intra-articular hemarthrosis and peri-articular soft tissue hematomas appears important but little guidance exist to support self-diagnosis by patients in the home care setting.

<b>Aim:</b> Central sleep apnea (CSA) and Cheyne-Stokes respiration (CSR) are associated with increased mortality rates in patients with heart failure and reduced ejection fraction (HFrEF) and may trigger ventricular arrhythmias. Therefore, we investigated predictors of ventricular arrhythmias in HFrEF patients with CSA. <b>Methods:</b> 239 patients with HFrEF and CSA (apnea-hypopnea index &amp;gt;15/h with ≥50% central events) of the SERVE-HF major substudy with available polysomnography including nocturnal ECG were analyzed. CSR was quantified in ≥20% and &amp;lt;20% of total recording time. High ventricular arrhythmia burden was defined as &amp;gt;30 premature ventricular contractions (PVCs) per hour of sleep. A subanalysis was performed to evaluate the temporal association of CSR with ventricular arrhythmias in sleep stage N2 (55 hours). <b>Results:</b> High ventricular arrhythmia burden was observed in 44% of the sample. In multivariate regression analysis, male sex, lower systolic blood pressure, antiarrhythmics and CSR≥20% were associated with PVC&amp;gt;30/hour (odds ratio [95%CI]: 5.49 [1.51;19.91], p=0.010; 0.98 [0.97;1.00], p=0.017; 0.20 [0.08;0.52], p=0.001; 2.22 [1.22;4.05]; p=0.009; respectively). PVCs were more frequent in sleep phases with CSR than without CSR (median [IQR]: 64.6 [24.8; 145.7] vs. 34.6 [4.8; 75.2] per hour N2 sleep; p=0.006). <b>Conclusion:</b> High burden of ventricular arrhythmias occurred in 44% of patients with HFrEF and CSA. Risk factors for PVCs&amp;gt;30/hour were male sex, lower systolic blood pressure, antiarrhythmic medication and CSR≥20%. Ventricular arrhythmia burden was higher during sleep with CSR than without CSR.

Carrier selective junctions formed by polycrystalline silicon (poly-Si) on ultra-thin silicon oxide films are currently in the spotlight of silicon photovoltaics. We develop a simple method using selective etching and conventional optical microscopy to determine the pinhole density in interfacial oxide films of poly-Si on oxide (POLO)-junctions with excellent electrical properties. We characterize the selective etching of poly-Si versus ultra-thin silicon oxide. We use test structures with deliberately patterned openings and 3 nm thin oxide films to check the feasibility of magnification by undercutting the interfacial oxide. With the successful proof of our concept we introduce a new method to access the density of nanometer-size pinholes in POLO-junctions with excellent passivation properties.

Polycrystalline silicon (poly-Si) layers on thin silicon oxide films have received strong research interest as they form excellent carrier selective junctions on crystalline silicon substrates after appropriate thermal processing. Recently, we presented a new method to determine the pinhole density in interfacial oxide films of poly-Si on oxide (POLO)-junctions with excellent electrical properties. The concept of magnification of nanometer-size pinholes in the interfacial oxide by selective etching of the underlying crystalline silicon is used to investigate the influence of annealing temperature on pinhole densities. Eventually, the pinholes are detected by optical microscopy and scanning electron microscopy. We present results on the pinhole density in POLO-junctions with J0 values as low as 1.4 fA/cm2. The stability of this method is demonstrated by proving that no new holes are introduced to the oxide during the etching procedure for a wide range of etching times. Finally, we show the applicability to multiple oxide types and thickness values, differently doped poly-Si layers as well as several types of wafer surface morphologies. For wet chemically grown oxides, we verified the existence of pinholes with an areal density of 2×107cm−2 even already after annealing at a temperature of 750°C (lower than the optimum annealing temperature for these junctions).

Ultra-thin interfacial silicon oxide layers are grown by microwave-based plasma oxidation at temperatures below 200°C. The influence of plasma gas composition and plasma pulsing on layer properties is tested. The oxides are compared to standard thermally grown oxide and wet chemical oxide. Layer properties are evaluated by x-ray photo electron spectroscopy and are electrically characterized by means of TiN/HfO2/SiO2 high-k metal gate stacks.

Reducing surface recombination is a key factor in the race for high efficient silicon‐based solar cells. One solution is the use of carrier selective contacts, which have been investigated extensively by several groups in the last years [1]‐[5]. Even though polycrystalline (poly‐)Si/SiO x /crystalline (c‐)Si junctions were subject of research decades ago for use in bipolar transistors [6]‐[7] there are still different point of views about the physical principles of current transport in these junctions [8],[2]. Besides tunneling, current transport through pinholes is discussed [2]. It was already shown that high fractions of oxide disruptions lead to inferior electrical properties [5]. However, as stated in the model [2], only pinhole densities as low as 8 × 10 5 to 3 × 10 9 cm ‐ ² are needed to describe the current flow / the junction resistance correctly. Analyzing such hole densities in poly‐Si/SiO x /c‐Si junctions is very difficult. If we assume, that the existence of holes leads to an increased diffusion of dopants from the poly‐Si into the c‐Si we can indirectly prove the existence by measuring the local dopant concentration. However, methods like electrochemical capacitance‐voltage profiling or secondary ion mass spectrometry show the averaged distribution of dopants in a larger area and can only be used to compare different samples qualitatively. Conductive AFM is possible in general but it is not suitable for our samples due to the high transverse conductivity of the highly doped poly‐Si of about 150 nm thickness. We have to remove or at least drastically reduce the thickness of the poly‐Si, but therefore an etch process with a high selectivity ratio to SiO 2 with a thickness well below 2 nm is needed. Even when all these issues are solved, we don't get detailed information about hole diameter (expected to be around 5 nm [2]) and structure of the oxide around these holes. These questions can be answered by TEM, but the probability of finding holes with densities that low is very small. However, proving the existence of holes in the oxide by TEM for samples with good electrical results would be the first step of proving that current through poly‐Si/SiO x /c‐Si junctions is not only related to tunneling. In this paper we investigate the influence of annealing temperature on the structural properties of in situ boron doped p+‐poly‐Si/SiO x /c‐Si interfaces after annealing at temperatures between 800 °C and 1050 °C. We analyze the evolution of holes for 1.7 nm thin wet‐chemically grown SiO x in comparison to thermally grown oxide using high resolution TEM and compare our findings to electrical results. We confirm that a massive break‐up of the oxide leads to poor electrical properties. Additionally, we prove the existence of pinholes in a sample with wet‐chemically grown oxide annealed at 800 °C showing good electrical results with an emitter current density J 0e as low as 41 fA/cm 2 . These results indicate a certain area fraction of pinholes is not in contradiction with good passivation properties of poly‐Si/SiO x /c‐Si junctions. The flow of charge carriers through these pinholes possibly poses an important current transport mechanism besides the superposed tunneling in the region in which the interfacial oxide is still intact.

In the semiconductor industry Germanium is expected as the promising channel material for future high-mobility CMOS transistors because of its highest hole mobility among common elemental and compound semiconductors, and an electron mobility that is two times larger than that of Si. This article shows that oxides can be grown and/or in a subsequent process step nitridized for planar Ge and Si devices at very low temperatures (T < 460 °C). The stable oxide growth on Germanium through plasma processing is studied as a function of relevant processing parameters like time, gaseous ambient etc. For Silicon the bonding structure of pure and nitridized low-temperature grown SiO2 is analyzed, followed by an electrical characterization of 0.8 to 1.2 nm interfacial layers on Si.

Zur Beurteilung von Fremdkorpern im Gastrointestinaltrakt gehoren naturlich ausreichende anatomische Kenntnisse uber den GI-Trakt und die zugehorigen Organe (◘ Abb. 5.1).

Ausgehend von einer Vielzahl von sachlichen Problemen mit heterogenen und raumlich weit verstreuten Applikationslandschaften in Verbindung mit der Okonomisierung der IT (wieviel Nutzen stiftet 1 € IT-Invest?) wurde vor knapp einem Jahrzehnt eine Konsolidierungswelle der Hardu. Softwareapplikationen, masgeblich in Grosunternehmen, losgetreten. Im Rahmen dieser Konsolidierungsaktivitaten mussten zwangslaufig die zugehorigen Daten mitmigriert werden. Ein wesentlicher Treiber fur diese heterogenen Systemlandschaften in Grosunternehmen waren die von der Finanzwelt getriebenen Mergers & Akquisitions (M&A). In den einschlagigen Fachpublikationen wird bei M&A Projekten uber Misserfolgsquoten von 70–90 % berichtet1. Die Konsequenz aus dieser hohen Misserfolgsquote ist, dass bei einem Scheitern die vorher bewerkstelligte Integration ganz oder teilweise ruckgangig gemacht werden muss. Das Migrationskarussell dreht die nachste Runde. Im Schlepptau dieser Entwicklung hat sich mittlerweile eine spezialisierte Dienstleistungsindustrie etabliert. Nachdem die Integration der IT im Rahmen der Post-Merger-Aktivitaten eine Vielzahl von Problemen aufgeworfen hat, wird mittlerweile versucht, dieses Thema proaktiv unter dem Begriff der Pre-Merger Integration anzugehen. Dass der Trend zur Zentralisierung/Konsolidierung nicht ausschlieslich ein IT Phanomen ist, soll an einem Beispiel aus einer anderen Branche erlautert werden. Flurbereinigung bezeichnet ein landliches/landwirtschaftliches Bodenordnungsverfahren, das die Neuordnung des landund forstwirtschaftlichen Grundbesitzes