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  • Open Access Icon
  • Research Article
  • 10.1016/j.ssel.2023.05.001
Empirical Study of the Cut-Off Frequency of Multi-Finger Nanometer MOS Transistor
  • Jan 1, 2022
  • Solid State Electronics Letters
  • Wing-Shan Tam + 1 more

  • Open Access Icon
  • Research Article
  • 10.1016/j.ssel.2023.02.001
A 1.3-mW 73.3-dB DR 10-MHz Bandwidth CT Delta-Sigma Modulator with a Charge-Recycled SC DAC and 52.7-dB Alias Rejection
  • Jan 1, 2022
  • Solid State Electronics Letters
  • Hetong Wang + 2 more

  • Open Access Icon
  • Research Article
  • 10.1016/j.ssel.2022.12.001
A capacitor-free fast-response low-dropout voltage regulator
  • Jan 1, 2022
  • Solid State Electronics Letters
  • Wing Shan Tam + 2 more

  • Open Access Icon
  • Research Article
  • 10.1016/j.ssel.2022.06.001
Design of Convex Corner Compensation Pattern in Manufacturing of Si Diaphragms
  • Jan 1, 2022
  • Solid State Electronics Letters
  • Nam Chol Yu + 3 more

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  • Research Article
  • Cite Count Icon 8
  • 10.1016/j.ssel.2021.12.003
Multi-layer Perceptron based Comparative Analysis between CNTFET and Quantum Wire FET for Optimum Design Performance
  • Dec 1, 2021
  • Solid State Electronics Letters
  • Arpan Deyasi + 3 more

  • Open Access Icon
  • Research Article
  • Cite Count Icon 13
  • 10.1016/j.ssel.2021.12.005
Enhanced Performance Double-gate Junction-less Tunnel Field Effect Transistor for Bio-Sensing Application
  • Dec 1, 2021
  • Solid State Electronics Letters
  • Isukapalli Vishnu Vardhan Reddy + 1 more

In this work, a double gate junction-less tunnel FET (DG-JLTFET) has been evaluated for biosensing applications. Tunnelling is the concept in JLTFET which is a heavily doped JL transistor, by decreasing the barrier length between the source and channel of the device which is easily used for switching (ON and OFF) purpose. Based on the research and simulation so far on JLTFET, this has achieved a greater performance when compared to that of MOSFET. JLTFET with more dielectric (k) and low K spacers will give an ON current (0.1 mA/µm) for gate voltage 3V and for off current of (10−15 A/ µm) and performance with Ion/Ioff ratio at 1012 and subthreshold swing with 60 mV/dec is obtained at 20 nm length of the gate at room temperature. So, JLTFET is a better device for switching performance. The evaluation of device performance is also done based on different cavity thicknesses and different dielectric constants. Including these parameters, double gate-pocket-junction-less TFET is highly used in biosensor applications. In the following, we demonstrate high performance based on pocket region which is introduced to implement in JLTFET for biosensor label-free detection

  • Open Access Icon
  • Research Article
  • Cite Count Icon 18
  • 10.1016/j.ssel.2021.12.002
Computational Study of Adsorption behavior of CH4N2O and CH3OH on Fe decorated MoS2 monolayer
  • Dec 1, 2021
  • Solid State Electronics Letters
  • Bibek Chettri + 4 more

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  • Research Article
  • Cite Count Icon 1
  • 10.1016/j.ssel.2022.02.001
Digital Logic Implementation of Li-ion Battery Protector
  • Dec 1, 2021
  • Solid State Electronics Letters
  • Wing-Kong Ng + 2 more

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  • Research Article
  • Cite Count Icon 5
  • 10.1016/j.ssel.2021.12.001
JFET Region Design Trade-Offs of 650 V 4H-SiC Planar Power MOSFETs
  • Dec 1, 2021
  • Solid State Electronics Letters
  • Tianshi Liu + 5 more

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  • Research Article
  • Cite Count Icon 1
  • 10.1016/j.ssel.2021.12.006
A Capacitor-Reused 2b/Cycle Active-Passive Second-order Noise-Shaping SAR ADC
  • Dec 1, 2021
  • Solid State Electronics Letters
  • Xiao Wang + 2 more