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  • Research Article
  • 10.1561/1000000063-3
Evaluating Large Language Models for Automatic Register Transfer Logic Generation for Combinational Circuits via High-Level Synthesis
  • Jan 1, 2025
  • Foundations and Trends® in Electronic Design Automation
  • Sneha Swaroopa + 3 more

  • Research Article
  • 10.1561/1000000063-1
Deep Learning and Generative AI for Monolithic and Chiplet SoC Design and Verification: A Survey
  • Jan 1, 2025
  • Foundations and Trends® in Electronic Design Automation
  • Imed Ben Dhaou + 5 more

  • Research Article
  • 10.1561/1000000063-2
Large Language Models for EDA: From Assistants to Agents
  • Jan 1, 2025
  • Foundations and Trends® in Electronic Design Automation
  • Zhuolun He + 5 more

  • Research Article
  • Cite Count Icon 10
  • 10.1561/1000000056
Self-Powered Wearable IoT Devices for Health and Activity Monitoring
  • Jan 1, 2020
  • Foundations and Trends® in Electronic Design Automation
  • Ganapati Bhat + 5 more

Wearable devices have the potential to transform multiple facets of human life, including healthcare, activity monitoring, and interaction with computers. At the same time, a number of technical and adaption challenges hinder widespread and daily usage of wearable devices. Recent research efforts have focused on identifying these challenges and solving them such that the potential of wearable devices can be realized. In this monograph, the authors guide the reader through the state-of-the-art of wearable devices, detailing the challenges that researchers and designers face in achieving wide-adoption of the technology throughout society. The authors also identify the application areas where these devices are most likely to gain acceptance. They point the way to overcoming these challenges by detailing the recent advances in providing physically flexible designs, the energy management for such designs and finally consider some of the security and privacy aspects of wearable devices such that user compliance can be improved. This monograph serves as a comprehensive resource for challenges and solutions towards self-powered wearable devices for health and activity monitoring.

  • Research Article
  • Cite Count Icon 145
  • 10.1561/1000000053
Contracts for System Design
  • Jan 1, 2018
  • Foundations and Trends® in Electronic Design Automation
  • Albert Benveniste + 9 more

  • Research Article
  • Cite Count Icon 3
  • 10.1561/1000000044
Fast Uncovering of Graph Communities on a Chip: Toward Scalable Community Detection on Multicore and Manycore Platforms
  • Jan 1, 2016
  • Foundations and Trends® in Electronic Design Automation
  • Ananth Kalyanaraman + 5 more

Graph representations are pervasive in scientific and social computing.They serve as vital tools to model the interplay among differentinteracting entities.In this paper, we visit the problem of community detection, which isone of the most widely used graph operations toward scientific discovery.Community detection refers to the process of identifying tightlyknitsubgroups of vertices in a large graph. These sub-groups or communitiesrepresent vertices that are tied together through commonstructure or function. Identification of communities could help in understandingthe modular organization of complex networks. However,owing to large data sizes and high computational costs, performingcommunity detection at scale has become increasingly challenging.Here, we present a detailed review and analysis of some of the leadingcomputational methods and implementations developed for executingcommunity detection on modern day multicore and manycorearchitectures. Our goals are to: a define the problem of community detectionand highlight its scientific significance; b relate to challengesin parallelizing the operation on modern day architectures; c providea detailed report and logical organization of the approaches that havebeen designed for various architectures; and d finally, provide insightsinto the strengths and suitability of different architectures for communitydetection, and a preview into the future trends of the area. It is ourhope that this detailed treatment of community detection on parallelarchitectures can serve as an exemplar study for extending the applicationof modern day multicore and manycore architectures to othercomplex graph applications.

  • Research Article
  • Cite Count Icon 24
  • 10.1561/1000000043
Smart Connected Buildings Design Automation: Foundations and Trends
  • Jan 1, 2016
  • Foundations and Trends® in Electronic Design Automation
  • Mehdi Maasoumy + 1 more

  • Open Access Icon
  • Research Article
  • Cite Count Icon 4
  • 10.1561/1000000035
Computer-Aided Design and Optimization of Hybrid Energy Storage Systems
  • Jan 1, 2013
  • Foundations and Trends® in Electronic Design Automation
  • Younghyun Kim + 3 more

Electricity is the key to the proper functioning of modern human society. Ever-increasing electricity consumption gives rise to recent regulations and significant endeavors to improve the energy ef...

  • Open Access Icon
  • Research Article
  • Cite Count Icon 39
  • 10.1561/1000000034
Rigorous System Design
  • Jan 1, 2013
  • Foundations and Trends® in Electronic Design Automation
  • Joseph Sifakis

The monograph advocates rigorous system design as a coherent and accountable model-based process leading from requirements to correct implementations. It presents the current state of the art in system design, discusses its limitations, and identifies possible avenues for overcoming them.A rigorous system design flow is defined as a formal accountable and iterative process composed of steps, and based on four principles: (1) separation of concerns; (2) component-based construction; (3) semantic coherency; and (4) correctness-by-construction. The combined application of these principles allows the definition of a methodology clearly identifying where human intervention and ingenuity are needed to resolve design choices, as well as activities that can be supported by tools to automate tedious and error-prone tasks. An implementable system model is progressively derived by source-to-source automated transformations in a single host component-based language rooted in well-defined semantics. Using a single modeling language throughout the design flow enforces semantic coherency. Correct-by-construction techniques allow well-known limitations of a posteriori verification to be overcome and ensure accountability. It is possible to explain, at each design step, which among the requirements are satisfied and which may not be satisfied.The presented view for rigorous system design has been amply implemented in the BIP (Behavior, Interaction, Priority) component framework and substantiated by numerous experimental results showing both its relevance and feasibility.The monograph concludes with a discussion advocating a systemcentric vision for computing, identifying possible links with other disciplines, and emphasizing centrality of system design.

  • Open Access Icon
  • Research Article
  • Cite Count Icon 3
  • 10.1561/1000000019
Discrete Circuit Optimization
  • Jan 1, 2012
  • Foundations and Trends® in Electronic Design Automation
  • John Lee + 1 more

As part of the Physical Design process for digital circuits, the design is mapped to the cells from a given standard cell library. These libraries contain many different variants of each logical function that may vary in transistor widths, lengths, and threshold voltages. Choosing the right cell for each gate in the design is the discrete gate sizing and threshold assignment problem. Discrete gate sizing and threshold assignment are some of the most powerful and commonly used methods for optimizing power/performance/area in digital circuits. Discreteness of the problem makes it computationally difficult and has attracted significant research attention over the past three decades. Discrete Circuit Optimization: Library Based Gate Sizing and Threshold Voltage Assignment surveys this field, providing the background needed to understand the problem and perform research in the area. Concepts such as standard cell libraries, static timing analysis, and analytical delay and power models are explained, along with examples and data to help understand the tradeoffs involved. Popular classes of sizing algorithms are explained and comparative results are provided to show the current state of the field. This is an ideal reference text for graduate students and researchers in electronic design automation, and physical designers looking to improve the performance of their designs.