Wet Recess Etching Research Articles

Normally-off AlGaN/GaN-based MOS-HEMT with self-terminating TMAH wet recess etching

Normally-off AlGaN/GaN-based MOS-HEMT has been fabricated by utilizing damage-free self-terminating tetramethyl ammonium hydroxide (TMAH) recess etching. The device exhibited a threshold voltage of +2.0 V with good uniformity, extremely small hysteresis of ∼20 mV, and maximum drain current of 210 mA/mm. The device also exhibited excellent off-state performances, such as breakdown voltage of ∼800 V with off-state leakage current as low as ∼10−12 A and high on/off current ratio (Ion/Ioff) of 1010. These excellent device performances are believed to be due to the high quality recessed surface, provided by the simple self-terminating TMAH etching.

A Low Noise Planar-Type Avalanche Photodiode using a Single-Diffusion Process in Geiger-Mode Operation

We report the performances of a planar-type Geiger-mode InGaAs/InP avalanche photodiode (APD) using a single-diffusion process based on a single wet recess-etching technique at a wavelength of 1.55 µm. The recess-etched window region is found to have a smoothly etched sidewall with a large slope width of 0.9 µm. The Geiger-mode characteristics have been measured at 240–280 K for a 20 µm diameter device. The fabricated Geiger-mode APD shows a low dark count probability (DCP) per gate pulse of 2.8×10-3, a high photon detection efficiency (PDE) of 17.4%, and a low noise equivalent power (NEP) of 1.74×10-16 W/Hz1/2 at 240 K. The results are the first demonstration of a planar-type single-diffused Geiger-mode APD using a single wet recess-etching.

Super low noise InGaP gated PHEMT

Very high performance InGaP/InGaAs/GaAs PHEMTs will be demonstrated. The fabricated InGaP gated PHEMTs devices with 0.25 × 160/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and 0.25 × 300 μm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> of gate dimensions show 304 mA/mm and 330 mA/mm of saturation drain current at V/sub GS/ = 0 V, V/sub DS/ = 2 V, and 320 mS/mm and 302 mS/mm of extrinsic transconductances, respectively. Noise figures for 160 μm and 300 μm gate-width devices at 12 GHz are measured to be 0.46 dB with a 13 dB associated gain and 0.49 dB with a 12.85 dB associated gain, respectively. With such a high gain and low noise, the drain-to-gate breakdown voltage can be larger than 11 V. Standard deviation in the threshold voltage of 22 mV for 160 μm gate-width devices across a 4-in wafer can be achieved using a highly selective wet recess etching process. Good thermal stability of these InGaP gated PHEMTs is also presented.

Gate Orientation Dependence of InGaAs/AlGaAs High Electron Mobility Transistors Formed by Wet Recess Etching

The gate orientation dependence of InGaAs/AlGaAs high electron mobility transistors (HEMTs) formed by the wet-chemical recess etching has been evaluated. The short channel effect strongly depends on the gate orientation and is significant in the order of [011], [001] and [011] oriented devices. Such orientation dependence results from a difference of the side-etching lengths, which are 0.01 µm, 0.03 µm and 0.06 µm for the [011], [001] and [011] oriented devices, respectively. The other characteristics of HEMTs such BVgd, gm and fT also depend on the gate orientation because of a difference of the recessed shape.

Low excess noise of InAlAs/InP HFETs fabricatedusing selective dry recess etching

The low frequency noise (10 Hz-100 kHz) behaviour of InAlAs/InP HFETs fabricated using CH/sub 4//H/sub 2/ selective dry recess etching is reported. Devices from the same epitaxial structure fabricated using wet recess etching are also presented for comparison. The dry etching technique improves the drain noise spectral density. This improvement is attributed to the decrease in the source and drain resistance from 2.4 /spl Omega/ mm for the wet recess, to 1.6 /spl Omega/ mm For the dry recess. The equivalent series resistance fluctuations can explain the noise behaviour in both devices. No significant passivation of traps occurs during the CH/sub 4//H/sub 2/ etching process, as demonstrated by noise measurements on annealed dry etched devices.

Enhancement-mode buried gate InGaP/AlGaAs/InGaAsheterojunction FETs fabricated by selective wet etching

Enhancement-mode buried gate InGaP/AlGaAs/InGaAs heterojunction FETs (HJFETs) were successfully fabricated by using a highly-selective wet recess etching technique. The fabricated HJFET exhibited a maximum drain current of 202 mA/nm, a peak transconductance of 330 mS/mm and a gate-drain breakdown voltage of 33 V. Standard deviation of the threshold voltage was 60 mV, which is less than one fifth that of the conventional AlGaAs/InGaAs HJFET. No appreciable frequency dispersion in the drain current was measured, indicating that the developed InGaP/AlGaAs/InGaAs HJFET with a buried gate structure is promising for large-signal microwave power applications.

Very low damage etching of GaAs

A very low damage, anisotropic and selective reactive ion etching process has been developed using SiCl4 for etching GaAs which stops on extremely thin GaAlAs layer (4 monolayers 1.13 nm thick). Using low rf powers of ≤15 W, and hence low dc biases of 40 to ≤70 V, pressures of 8 mTorr and flow rates of 4–6 sccm, the damage was kept to a minimum value while maintaining very good anisotropy. Both the surface and sidewall damage were measured and the results were confirmed by evaluation of the performance of a metal–semiconductor field effect transistor (MESFET) with a recessed gate. Raman scattering studies of the etched surface of a heavily doped GaAs layer show that the surface damage thickness is only 3–4 nm after 2 min of etching. The damage depth increases and saturates at 9 nm after 4 min of etching (etch rate of ∼100 nm/min). Conductance measurements [S. Thoms, S. P. Beaumont, C. D. W. Wilkinson, J. Frost, and C. R. Stanley, in Microcircuit Engineering, edited by H. W. Lehman and Ch. Bleicher (North Holland, Amsterdam, 1986), p. 249] of narrow wires formed in n+-GaAs by etching at dc biases of 40–70 V show that the sidewall damage is negligible (1 nm/sidewall) after the first 2 min of etching. This value increases to 5 nm/sidewall after 3 min etching and to 12 nm/sidewall after 5 min. This is far lower than the value 18 nm/sidewall obtained by etching for 2 min at dc biases of 200 V. Control of the transconductance of the GaAs MESFETs by wet recess etching is difficult. Dry etching to a thin stop layer is a better method, provided it is damage-free. A ratio of etching rates of GaAs: Ga0.7Al0.3As of ≳10 000:1 on a 4 monolayer thick Ga0.7Al0.3As was obtained. On existing FET device wafers with a 5 nm GaAlAs stop layer, after 2 min etching which is sufficient to come to the stop layer, the transconductance was 4.02 mS, after 5 min etching was 3.67 mS and after 12 min was 2.05 mS. Optical emission spectroscopy revealed that the dominant emitting species in the plasma are Si, SiCl, SiCl2, and Cl. The variation of emission intensity of these species with power reveals clearly the presence of two distinct etch mechanisms, one below and one above 15 W (0.066 W/cm2) power density. The etch rate does not increase monotonically with power.