Video Graphics Array Research Articles

A 256 × 256 LiDAR Imaging System Based on a 200 mW SPAD-Based SoC with Microlens Array and Lightweight RGB-Guided Depth Completion Neural Network.

Light detection and ranging (LiDAR) technology, a cutting-edge advancement in mobile applications, presents a myriad of compelling use cases, including enhancing low-light photography, capturing and sharing 3D images of fascinating objects, and elevating the overall augmented reality (AR) experience. However, its widespread adoption has been hindered by the prohibitive costs and substantial power consumption associated with its implementation in mobile devices. To surmount these obstacles, this paper proposes a low-power, low-cost, single-photon avalanche detector (SPAD)-based system-on-chip (SoC) which packages the microlens arrays (MLAs) and a lightweight RGB-guided sparse depth imaging completion neural network for 3D LiDAR imaging. The proposed SoC integrates an 8 × 8 SPAD macropixel array with time-to-digital converters (TDCs) and a charge pump, fabricated using a 180 nm bipolar-CMOS-DMOS (BCD) process. Initially, the primary function of this SoC was limited to serving as a ranging sensor. A random MLA-based homogenizing diffuser efficiently transforms Gaussian beams into flat-topped beams with a 45° field of view (FOV), enabling flash projection at the transmitter. To further enhance resolution and broaden application possibilities, a lightweight neural network employing RGB-guided sparse depth complementation is proposed, enabling a substantial expansion of image resolution from 8 × 8 to quarter video graphics array level (QVGA; 256 × 256). Experimental results demonstrate the effectiveness and stability of the hardware encompassing the SoC and optical system, as well as the lightweight features and accuracy of the algorithmic neural network. The state-of-the-art SoC-neural network solution offers a promising and inspiring foundation for developing consumer-level 3D imaging applications on mobile devices.

Focal plane array based on HgTe nanocrystals with photovoltaic operation in the short-wave infrared

Thanks to their remarkable spectral tunability across the entire infrared range, HgTe nanocrystals present a unique platform for designing infrared optoelectronic devices. While in recent years most of the significant advances in this domain have been made on devices at the single-pixel level, there is a growing trend toward exploring the potential of this material for imaging applications. However, until recently, focal plane arrays based on HgTe colloidal nanocrystals have been limited to the photoconductive mode, which is inherently associated with a large dark current. In this work, we demonstrate a diode stack compatible with a readout integrated circuit whose back-end processing has been optimized to ensure compatibility with a complete diode stack deposition. The diode design is also optimized to generate a Fabry–Pérot cavity in which 50% of the light is effectively absorbed at the band edge. Finally, taking benefit from the full video graphics array format, high-resolution images are taken.

A 915–1220 TOPS/W, 976–1301 GOPS Hybrid In-Memory Computing Based Always-On Image Processing for Neuromorphic Vision Sensors

Neuromorphic vision sensors (NVSs) save energy and reduce data at the source by asynchronously recording changes in temporal contrast. Thus, NVS provides an opportunity to exploit temporal and spatial redundancy in video streams by enabling the following deep neural network (DNN) processor for object recognition to process only foreground object regions in valid frames. However, the NVS data inevitably contains noise leading to false frame generation. Moreover, objects may be fragmented due to a lack of events leading to wrong object region proposals (RPs). Hence, it is important to have an always ON image processor to perform image restoration (IR) and RP operations for NVS data. In this article, we propose a hybrid memory bitcell with collocated static random access memory (SRAM) and dynamic random access memory (DRAM) consisting of 11 transistors [11T-collocated SRAM and DRAM (CRAM)] to perform in-memory computing (IMC)-based IR and RP for event-based binary image (EBBI) frame from a stationary NVS. We propose IMC-based charge diffusion for IR (denoise and region filling) by enabling a 2-D interconnection of bitcells across the whole array for globally parallel computing. The proposed CRAM supports projection mode for IMC-based RP, which enables 1-D projection of objects on the horizontal and vertical axes and finds regions through a recently proposed iterative algorithm. We also proposed an RP update (RPU) algorithm and hardware to improve RP accuracy by 1.6 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times $ </tex-math></inline-formula> over the prior art. Implemented in 65 nm CMOS, the 320 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times $ </tex-math></inline-formula> 240 quarter video graphics array (QVGA) macro achieves a maximal energy efficiency (throughput) of 1220 TOPS/W (1301 GOPS) without RPU and 915 TOPS/W (976 GOPS) with RPU, both of which are superior to the prior art. We also show that the accuracy of IR and RP obtained by the proposed architecture is better than earlier methods.

Hardware Realization of Kinematic Mechanism and Control System of Multifunctional Industrial Robot

In order to improve the position control accuracy of industrial robots and solve the problems of poor real-time and reconfigurability of traditional motion controllers, a hardware implementation method for the motion mechanism and control system of multi-functional industrial robots is proposed. The video acquisition system is suitable for infrared detectors containing 4 channels or readout circuits in 4 channels. The video display system is compatible with the old AV/S-Video interface, and is also suitable for computer system video graphics array (VGA) analog video interface and high-definition video interface. Multimedia Interface (HDMI) digital high-definition video interface display terminal equipment. The hardware circuit of video acquisition and corresponding video interface image output is designed, including signal amplification circuit, analog-to-digital conversion circuit, video information buffer circuit, video display digital-to-analog conversion circuit, and interface hardware circuit, to realize the digitization of image information acquisition and image information. Display simulation, construct VGA, AV/S-Video, and HDMI timing sequence with hardware description language through Field programmable gate array (FPGA) to complete the display of corresponding terminal equipment. The experimental results show that the experimental data was substituted into the formula and the variance σ = 0.09 mm was found, indicating that the detection error of the system is less than 0.27 mm, which meets the detection requirements. Through the 3D contour reconstruction experiment of the workpiece, the expected function realization of each module is proved, and the feasibility of the system software and hardware system is verified. This design has good scalability and stability, reducing labor costs.

The 60th Anniversary of TFTs and the Evolution of High‐Resolution Displays

The 60th Anniversary of TFTs and the Evolution of High‐Resolution Displays

Double compression detection in HEVC-coded video with the same coding parameters using picture partitioning information

Detection of double compression, particularly in the high-efficiency video coding (HEVC) compressed domain, is one of the most operative and efficacious ways of authenticating the validity of videos in the field of forensic analysis. The strength of identifying abnormalities in the videos confides in diverse coding parameters (such as quantization parameters, size and structure of the group of pictures, and modes of compression). Many methods have been introduced to dig up HEVC double compression with different coding parameters. However, the revelation of the HEVC double compression under the same coding environments still remains a competitive task, as recompressions leave small footprints. In this paper, we introduce a novel method based on frame partitioning information to distinguish between single and double compressions with the same coding parameters. We propose extracting statistical and deep convolution neural network (DCNN) features from partition pictures and prediction modes, including coding unit, prediction unit, transform unit, and most probable modes information. Finally, machine learning technology is integrated to categorize videos into two classes, single and double compressions, by combining the statistical and DCNN features. We obtain the best experimental results by assembling the statistical and DCNN features for wide video graphics array (WVGA) and high-definition (HD) sequences with average accuracies of 99.66% and 99.60% in all-intra and 99.46% and 99.33% in low-delay P modes respectively. Experimental results of the proposed system show the effectiveness and efficiency over the state-of-the-art techniques in video forensic.

Driver Behaviors Recognizer Based on Light-Weight Convolutional Neural Network Architecture and Attention Mechanism

Driving is a set of behaviors that need high concentration. Sometimes these behaviors are dominated by other acts such as smoking, eating, drinking, talking, phone calls, adjusting the radio, or drowsiness. These are also the main causes of current traffic accidents. Therefore, developing applications to warn drivers in advance is essential. This research introduces a light-weight convolutional neural network architecture to recognize driver behaviors, helping the warning system to provide accurate information and to minimize traffic collisions. This network is a combination of feature extraction and classifier modules. The feature extraction module uses the advantages of the standard convolution layers, depthwise separable convolution layers, average pooling layers, and proposed adaptive connections to extract the feature maps. The benefit of the convolution block attention module is deployed in the feature extraction module that guides the network in learning the salient features. The classifier module is comprised of a global average pooling and softmax layer to calculate the probability of each class. The overall design optimizes the network parameters and maintains classification accuracy. The entire network is trained and evaluated on three benchmark datasets: the State Farm Distracted Driver Detection, the American University in Cairo version 1, and the American University in Cairo version 2. As a result, the accuracies on overall classes (ten classes) are 99.95&#x0025;, 95.57&#x0025;, and 99.61&#x0025;, respectively. Also, several video tests with VGA (Video Graphics Array), HD (High Definition), and FHD (Full High Definition) resolution were conducted, and they can be seen at <uri>https://bit.ly/3GY2iJl</uri>.

Применение технологии SDR (Software Defined Radio) для восстановления сигналов побочных электромагнитных излучений видеотракта

This article presents the results of recovering signals of spurious electromagnetic radiation of a video path using an SDR receiver. This work demonstrates the existence of a potential risk of leakage of confidential information through a technical channel of information leakage due to spurious electromagnetic radiation of a video path, bypassing traditional cryptographic and physical methods of information protection. An attack can be carried out by an attacker without special technical knowledge and special professional expensive equipment. The presented stand makes it possible to simplify research related to spurious electromagnetic radiation, as well as to apply this technology to build a learning process in this domain. In the course of the work, a description of the concept of a technical channel of information leakage and a brief description of the side electromagnetic radiation of the video path are given. The following briefly describes the SDR technology, the selected USRP B210 receiver, and the cross-platform open source GNU Radio software package. The demonstration stand is described in detail and the results of image reconstruction are given. In addition, two stages of the development of a demonstration stand are considered: using a simulation signal and a real intercepted signal. A demonstration stand with simulation signals serves to develop a user's understanding of the properties of spurious electromagnetic radiation, as well as possible obstacles to converting an intercepted signal into an image. The studies of the real intercepted signal were carried out on a monitor with a set resolution of 1280×1024 and a screen refresh rate of 60 Hz. An analog VGA (Video Graphics Array) interface was used to connect the monitor. The dependence of the quality of the reconstructed image on the set sampling frequency of the SDR receiver is shown.

Commercial-off-the-shelf event-based cameras for space surveillance applications

Event-based cameras (EBCs) are of interest for potential application to space domain awareness (SDA). EBC attributes, including asynchronous response and low latency provide data reduction, break the trade-off between latency and power, and enable consideration of additional algorithms and processing architectures due to individual timestamps for each event. Potential data reduction by a factor of 10 or greater is particularly attractive for SDA from satellite platforms with constraints on system power, processing, and communication bandwidth. Here we report our initial evaluation of Prophesee third-generation commercial-off-the-shelf (COTS) EBCs, including development of, and comparison with, a limiting magnitude model. The analytic model is a function of sky background radiance; EBC parameters including contrast threshold, dark current, pixel pitch, and spectral quantum efficiency; and the optic aperture diameter and focal length. Using an 85 mm f/1.4 lens, the measured detection limits for the half-size video graphics array (HVGA) and video graphics array (VGA)-format EBCs are 6.9 and 9.8 visual magnitudes (mV), respectively, at a sky background level of about 20.3mV per square arcsecond. The empirical sensitivity limit for the VGA differs by 0.1mV from our analytic prediction of 9.7 (less than 10% difference in flux). The limiting magnitude model assumes slow motion of point objects across the EBC focal plane array. Additional experiments exploring temporal behavior show that no stars are detected while scanning across the night sky faster than 0.5 deg per second using the VGA-EBC mounted to a 200 mm f/2.0 lens. The limited sensitivity of the evaluated COTS EBCs prevents their use as a replacement for typical CCD/CMOS framing sensors, but EBCs show clear promise for small-aperture, large-field persistent SDA in terms of their efficient capture of temporal information.

Motion discovery through change discovery filter matrix derived from the discrete cosine transform

The motion discovery algorithm through a change discovery filter matrix which is derived from the distinct Cosine Transform. Currently, a Fourier reorganization strategy gives efficient outcomes for motion detection. The major drawback of the motion detection was mentioned to be its calculation cost. The developers again retained about the issue and attained two orders of magnitude speedy than the earlier algorithm with good working. The rushing capability of the projected algorithm is about 800 frameworks per second for Video Graphics Array resolution portraits on customer hardware with the use of static matrix multiplication alone. The property applied for change detection filter matrix is named as symmetric property. Along with this, the algorithm is basically strong to the unexpected variation of brightness as a result of it operations depending on edge information. The developers examined and mentioned that the algorithm projected in this paper authenticate with confronting datasets which are having athletic and unexpected brightness variations.

Sistem Pakar Diagnosa Kerusakan VGA dengan Metode Certainty Factor dan Algoritma K-Nearest Neighbor (K-NN)

VGA (Video Graphics Array) is a Video adapter which is very useful for improving the performance and quality of the visual process on a computer, but sometimes there is often a malfunction that cannot be identified the type of damage. The problem is the lack of media to identify the damage that occurs during visual processing. Therefore, the authors created an expert system that can diagnose the type of damage to VGA using the Certainty Factor method as a calculation, using UML modeling as the work process flow of the system on the website, and also equipped with the KNN (K-Nearest Neighbor) algorithm as machine learning. so that it can build an expert system with the PHP programming language MySQL database. The method used in testing is the black box method in testing the system used. The results that can be concluded from this study are; 1) The diagnostic system for detecting damage to the VGA uses the K-Nearest Neighbor Algorithm as machine learning and the Certainty Factor Method as a calculation medium in determining the distance from the type of damage and has suggestions for further actions to deal with and prevent the damage from occurring and also has other possible damage things that are similar to the damage suffered can be accessed quickly and easily to understand, in making scientific research carried out sequentially to facilitate the process, and 2) In addition to diagnosing, there are several additional menus that can be accessed such as the Prediction menu which functions to displays the max and min limits of the temperature of a product, Product Info which functions as a quality product recommendation, and a description that contains a post of details of the damage that can be studied and is expected to help users find solutions to their problems.Keywords:Expert System, PHP, Certainty Factors, Machine learning, K-NN.

Best Solution for the Graphic Problem: A Single GPU or A Multi-GPU or An Upgradable GPU

Graphical Processing Unit (GPU) or in general graphic cards or VGA (Video Graphic Array) cards become major hardware of the computer world. After the development of the Graphical User Interfaces (GUIs) of Operating Systems (OSs), the most developed hardware after the processor is a graphic card. But a graphic card is consisting of a fixed amount of memory. It is the major limitation to use a graphic card for a certain big task because the memory limits the amount of data that can store in the graphic card. This paper briefly examines the possibility of installing more memory on a graphic card by the user according to the specific task.

WITHDRAWN: Features of urban architecture design based on ZYNQ embedded digital image processing

The city is excellent modern buildings are an excellent historical and cultural heritage, and its conservation studies include two important things: standard-setting and protection and management strategies. With the embedded digital image processing is becoming an important part of our lives, and image processing has reached its level. These systems have created many applications, such as processing in the field of image filtering and image processing. System implementation is completed with the low-cost Zed Board ZYNQ Seven thousand Field Programmable Gate Arrays (FPGA) and Raspberry-Pi. After various image processing filters, the output will be the input image. Get a Gaussian filter, a sharpening filter, and an average filter and display these results on your Video Graphics Array (VGA) monitor. Edge detection and grayscale operations are performed on Lena's image. Chip usage is detected. Using grid-based models and software algorithms derived from image processing, effective methods have been developed to measure geometric parameters and predict radiation exchange. The proposed system is generating synthetic urban textures and integrating cellular automata. The results show that a grid-based city model can provide information for planning and design. This system accelerates the detection of lung and lung disease and can be used as a single procedure or as part of other biomedical imaging systems. Image processing systems rely on bilateral filtration, edge recognition, multi-limits, image separation, text image processing, and image labeling.

Design of an Online Brain-Computer Interface System Based on Field Programmable Gate Array

In the article, an online brain-computer interface (BCI) demo system based on Field Programmable Gate Array (FPGA) was designed. A colour visual stimulator based on a Video Graphics Array (VGA) monitor controlled by FPGA is designed to produce transient visual stimulations. An electroencephalography (EEG) acquisition module including active electrodes and driven-right-leg circuit is used to acquire the visual evoked potential (VEP) signal; Finite impulse response (FIR) filtering combined with an averaging method allows for extraction of the weak VEP signals. The template matching method is used in target identification. The FPGA is successfully used in the BCI system to complete multiple tasks such as the VGA controller, analog to digital (AD) converter controller, VEP signal processor and electronic device controller. Experiments show that the subjects’ transient VEP can successfully activate the electronic devices by the online BCI system which has relatively high identification accuracy. All these results show that the real time BCI demo system based on FPGA is feasible and effective.

Catheter pose-dependent virtual angioscopy images for endovascular aortic repair: validation with a video graphics array (VGA) camera

Abstract Previous research reported catheter pose-dependent virtual angioscopy images for endovascular aortic repair (EVAR) (phantom studies) without any validation with video images. The goal of our study focused on conducting this validation using a video graphics array (VGA) camera. The spatial relationship between the coordinate system of the virtual camera and the VGA camera was computed with a Hand-Eye calibration so that both cameras produced similar images. A re-projection error of 3.18 pixels for the virtual camera and 2.14 pixels for the VGA camera was obtained with a designed three-dimensional (3D) printed chessboard. Similar images of the vessel (3D printed aorta) were acquired with both cameras except for the different depth. Virtual angioscopy images provide information from inside the vessel that may facilitate the understanding of the tip position of the endovascular tools while performing EVAR.

High Performance and Efficient Real-Time Face Detector on Central Processing Unit Based on Convolutional Neural Network

Face detection is crucial in the development of face recognition, expression, tracking, and classification. Conventional methods have accuracy constraints on several challenging conditions, including nonfrontal faces, occlusions, and complex backgrounds. However, the convolutional neural network (CNN) methods produce high performances despite a large amount of computation. Therefore, CNN requires expensive hardware and is not suitable for low-cost central processing units (CPUs). This article develops a light architecture for a CNN-based real-time face detector. The proposed architecture consists of two main modules, the backbone to extract distinctive facial features and multilevel detection to perform prediction at multiple scales. Furthermore, it utilizes several approaches to enhance the training result, including balancing loss and tweaks on the training configuration. The proposed detector has one stage and is trained using the input of images from WIDER FACE with challenges, which contains more challenging images than other datasets. As a result, the detector achieves state-of-the-art performance on several benchmark datasets compared with the other CPU-based models. Then, its efficiency is superior to that of competitors, as it runs at 53 frames per second on a CPU for video graphics array resolution images.

Fuzzy Image Processing Based Architecture for Contrast Enhancement in Diabetic Retinopathy Images

Diabetic retinopathy” is damage to retina denotes one of the problems of diabetes which is a significant reason for visual infirmity and blindness. A comprehensive and routine eye check is important to early detection and rapid treatment. This study proposes a hardware system that can enhance the contrast in the diabetic retinopathy eye fundus images as a first step in different eye disease diagnoses. The fuzzy histogram equalization technique is proposed to increases the local contrast of Diabetic Retinopathy Images. First, a histogram construction hardware architecture for different image processing purposes has been built then modified with fuzzy techniques to create fuzzy histogram equalization architecture, which is used to enhance the original images. Both architectures are designed using a finite-state machine (FSM) technique and programmed with VHDL programming language. The first one is implemented using two (Spartan 3E-XC3S500 and Xilinx Artix-7 XC7A100T) kits, while the second architecture is implemented using (Spartan 3E-XC3S500) kit. The system consists also of a modified video graphics array (VGA) port to display the input and resulted images with a proper resolution. All the hardware outputs are compared to that results produce from MatLab for verification and the resulted images are tested by PSNR, MSE, ENTROPY ,and AMBE

Quantifying and Ranking Quality for Acquired Recordings on Digital Video Recorders.

As the closed-circuit television (CCTV) security industry transitioned from analog media to digital video recorders (DVRs) with digital storage, the law enforcement community struggled with the means with which to collect the recordings. New guidelines needed to be established to determine the collection method which would be efficient as well as provide the best quality evidence from live DVRs. A test design was developed to measure, quantify, and rank the quality of acquisition methods used on live systems from DVRs typically used in digital CCTV systems. The purpose was to determine guidelines for acquiring the best quality video for investigative purposes. A test pattern which provided multiple quantifiable metrics for comparison between the methods of acquisition was used. The methods of acquisition included direct data download of the proprietary file and open file format as well as recording the video playback from the DVR via the available display monitor connections including the composite video, Video Graphics Array (VGA), and high-definition multimedia interface (HDMI). While some acquisition methods may provide the best quality evidence, other methods of acquisition are not to be discounted depending on the situation and need for efficiency. As an investigator that needs to retrieve video evidence from live digital CCTV systems, the proprietary file format, overall, provides the best quality evidence. However, depending on the circumstance and as recording technology continues to evolve, options other than the proprietary file format may provide quality that is equal to or greater than the proprietary file format.

A flexible and configurable GPGPU stereo matching framework

This paper presents a practical framework that consists of various local to global stereo matching algorithms on a general purpose computing on graphics processing units platform. The flexible framework provides users with a selection of individual sub-algorithms in each step of stereo matching. The framework runs on either a central processing unit or graphic processing unit across three different platforms, including a smartphone, embedded board, and desktop. On the basis of the proposed framework, we investigate different combinations of stereo matching algorithms for specific use cases. Accordingly, we provide the framework’s quantitative speed and accuracy analysis evaluated on the widely used stereo dataset. In addition, this paper also addresses the parallelization strategy on an embedded graphics processing unit. The experimental results show that the proposed framework is capable of real-time and accurate depth estimation of stereo input in video graphics array resolution on an embedded graphics processing unit.

A VGA Indirect Time-of-Flight CMOS Image Sensor With 4-Tap 7-$\mu$ m Global-Shutter Pixel and Fixed-Pattern Phase Noise Self-Compensation

A video graphics array (VGA) (640 $\times $ 480) indirect time-of-flight (ToF) CMOS image sensor has been designed with 4-tap 7- $\mu \text{m}$ global-shutter pixel in 65-nm back-side illumination (BSI) process. With a 4-tap pixel structure, we achieved motion artifact-free depth map. Peak current during exposure time has been reduced by current spreading with constant delay chain in the photo-gate driver. Column fixed-pattern phase noise (FPPN) from the constant delay chain is self-compensated by the proposed time-interleaving technique with the two inversely directional clock chains in the photo-gate driver. Quantum efficiency (QE) and demodulation contrast (DC) have been optimized by using appropriate optical engineering techniques with an optimal silicon thickness. As a result, QE of 34% at 940-nm near-infrared and high DC of 86% at 100-MHz modulation frequency have been achieved. In addition, motion artifact and column FPPN are successfully removed in the depth map. The proposed ToF sensor shows depth noise less than 0.57% with 940-nm illuminator over the working distance up to 4 m, and consumes only 160 mW for VGA output at 60 frames/s.