Work Function Variation Research Articles

Computing-Inexpensive Matrix Model for Estimating the Threshold Voltage Variation by Workfunction Variation in High-κ/Metal-gate MOSFETs

In high-κ/metal-gate (HK/MG) metaloxide-semiconductor field-effect transistors (MOSFETs) at 45-nm and below, the metal-gate material consists of a number of grains with different grain orientations. Thus, Monte Carlo (MC) simulation of the threshold voltage (VTH) variation caused by the workfunction variation (WFV) using a limited number of samples (i.e., approximately a few hundreds of samples) would be misleading. It is ideal to run the MC simulation using a statistically significant number of samples (> ~ 106); however, it is expensive in terms of the computing requirement for reasonably estimating the WFV-induced VTH variation in the HK/MG MOSFETs. In this work, a simple matrix model is suggested to implement a computing-inexpensive approach to estimate the WFV-induced VTH variation. The suggested model has been verified by experimental data, and the amount of WFV-induced VTH variation, as well as the VTH lowering is revealed.

Analysis of Random Variations and Variation-Robust Advanced Device Structures

In the past few decades, CMOS logic technologies and devices have been successfully developed with the steady miniaturization of the feature size. At the sub-30-nm CMOS technology nodes, one of the main hurdles for continuously and successfully scaling down CMOS devices is the parametric failure caused by random variations such as line edge roughness (LER), random dopant fluctuation (RDF), and work-function variation (WFV). The characteristics of each random variation source and its effect on advanced device structures such as multigate and ultra-thin-body devices (vs. conventional planar bulk MOSFET) are discussed in detail. Further, suggested are suppression methods for the LER-, RDF-, and WFV-induced threshold voltage (VTH) variations in advanced CMOS logic technologies including the double-patterning and double-etching (2P2E) technique and in advanced device structures including the fully depleted siliconon-insulator (FD-SOI) MOSFET and FinFET/tri-gate MOSFET at the sub-30-nm nodes. The segmentedchannel MOSFET (SegFET) and junctionless transistor (JLT) that can suppress the random variations and the SegFET-/JLT-based static random access memory (SRAM) cell that enhance the read and write margins at a time, though generally with a trade-off between the read and the write margins, are introduced.

Influence of work function variation of metal gates on fluctuation of sub-threshold drain current for fin field-effect transistors with undoped channels

Influence of work function variation (WFV) in metal gates (MGs) on fluctuation of sub-threshold drain current is investigated in detail by analyzing fluctuation of current–onset voltage (COV) for fin field-effect transistors (FinFETs) with polycrystalline TiN and amorphous TaSiN MGs. The polycrystalline TiN MG exhibits anomalously increased COV fluctuation of the nMOS FinFETs in comparison to the pMOS case, while the amorphous MG exhibits well suppressed COV fluctuation both for the n- and pMOS FinFETs. Through the discussion with regard to the WFV due to the polycrystalline TiN grains, it is concluded that the sub-dominant grains of TiN with lower work function (WF) in TiN form localized potential valleys in the channel of the nMOS FinFETs resulting in the anomalous leak current in the sub-threshold condition. In the pMOS FinFETs, in contrast, the lower WF grains in TiN form localized potential peaks for holes, which have less impact on the sub-threshold leakage.

Use of energy-filtered photoelectron emission microscopy and Kelvin probe force microscopy to visualise work function changes on diamond thin films terminated with oxygen and lithium mono-layers for thermionic energy conversion

Kelvin probe force microscopy (KPFM) and energy-filtered photoelectron emission microscopy (EF-PEEM) with vacuum UV (VUV) excitation have been used to study the work function of p -type diamond films treated to exhibit a negative electron affinity (NEA) surface. NEA was generated by a lithium-oxygen monolayer termination. This monolayer was achieved in two different ways: thermally evaporated films 50 nm thick were either treated by in situ vacuum annealing or by a subsequent water wash. The work function values obtained from these samples by EF-PEEM were compared with KPFM measurements to establish which of the two fabrication techniques was most effective in activating a NEA surface. The washing method was shown to be more effective and the work function values obtained by the two techniques were comparable, as they showed the same work function peaks at 4.54 eV in their respective histograms. It was found that neighbouring polycrystalline facets could show a large variation in work function of up to 400 meV.

Analysis of the Changes in Electronic Structures and Work Function Variation in Alkali Metal^|^mdash;Metal Surface Systems

Analysis of the Changes in Electronic Structures and Work Function Variation in Alkali Metal^|^mdash;Metal Surface Systems

P-type CuO Nanowires and thin Film for Highly Sensitive Kelvin Probe Gas Sensing Applications

Abstract A comparative study of Kelvin Probe (KP) surface work function analysis of p-type CuO thin films to its nanowires is presented. Thin films were prepared by RF magnetron sputtering and nanowires were grown by thermal oxidation of grown thin films. The structural characterization was carried out by SEM and micro-Raman spectrophotometry. Finally, Surface work function variations of both materials were recorded while exposing them to some oxidizing and reducing gases, looking for a comparison between their gas sensing performances. The collected results were analyzed and compared to improve our understanding about sensing mechanisms involved in these kinds of p-type materials.

Study of High-$k$/Metal-Gate Work Function Variation in FinFET: The Modified RGG Concept

Because the existing ratio of average grain size to gate area (RGG) method is not applicable for calculating the work function variation (WFV) in nonplanar device structures, a modified RGG method is used to quantitatively estimate the WFV in a high-k/metal-gate (HK/MG) FinFET. A plot of the calculated WFV against the RGG for the FinFET with a TiN gate-stack is validated by previous simulation results. The standard deviation of the WFV, σ(WFV), of the nonplanar multigate device structure (e.g., the FinFET) is lower than that of a planar device structure by ~30%.

Monte Carlo Simulation Study: the effects of double-patterning versus single-patterning on the line-edge-roughness (LER) in FDSOI Tri-gate MOSFETs

A Monte Carlo (MC) simulation study has been done in order to investigate the effects of line- edge-roughness (LER) induced by either 1P1E (single-patterning and single-etching) or 2P2E (double-patterning and double-etching) on fully- depleted silicon-on-insulator (FDSOI) tri-gate metal- oxide-semiconductor field-effect transistors (MOSFETs). Three parameters for characterizing the LER profile (i.e., root-mean square deviation (σ), correlation length (ζ), and fractal dimension (D)) are extracted from the image-processed scanning electron microscopy (SEM) image for each photolithography method. It is experimentally verified that two parameters (i.e., σ and D) are almost the same in each case, but the correlation length in the 2P2E case is longer than that in the 1P1E case. The 2P2E-LER- induced VTH variation in FDSOI tri-gate MOSFETs is smaller than the 1P1E-LER-induced VTH variation. The total random variation in VTH, however, is very dependent on the other major random variation sources, such as random dopant fluctuation (RDF) and work-function variation (WFV).

Variability and Reliability of Single-Walled Carbon Nanotube Field Effect Transistors

Excellent electrical performance and extreme sensitivity to chemical species in semiconducting Single-Walled Carbon NanoTubes (s-SWCNTs) motivated the study of using them to replace silicon as a next generation field effect transistor (FET) for electronic, optoelectronic, and biological applications. In addition, use of SWCNTs in the recently studied flexible electronics appears more promising because of SWCNTs’ inherent flexibility and superior electrical performance over silicon-based materials. All these applications require SWCNT-FETs to have a wafer-scale uniform and reliable performance over time to a level that is at least comparable with the currently used silicon-based nanoscale FETs. Due to similarity in device configuration and its operation, SWCNT-FET inherits most of the variability and reliability concerns of silicon-based FETs, namely the ones originating from line edge roughness, metal work-function variation, oxide defects, etc. Additional challenges arise from the lack of chirality control in as-grown and post-processed SWCNTs and also from the presence of unstable hydroxyl (–OH) groups near the interface of SWCNT and dielectric. In this review article, we discuss these variability and reliability origins in SWCNT-FETs. Proposed solutions for mitigating each of these sources are presented and a future perspective is provided in general, which are required for commercial use of SWCNT-FETs in future nanoelectronic applications.

Ab initio Study of Metal Grain Orientation-Dependent Work Function and its Impact on FinFET Variability

A novel method to model the effect of local workfunction variation in high-k metal gate nanoscale transistors is proposed. Impact of variability in metal grain granularity on device performance is studied using ab initio density functional theory calculations and device simulations, which show that different metal grain orientations (GOs) can result in large (≥100 mV) variation in metal gate effective work function. Probabilities of occurrence of each GO and the grain size are used to estimate the work-function variations. Full 3-D device simulations are performed to study the effect of metal grain granularity on FinFET and planar MOSFET behavior. Simulated mismatch trends are shown to be in good agreement with the grain diameters and device geometries.

Influence of different metal over-layers on the electrical behaviour of the MIS Schottky diodes

We have employed technology computer-aided design – a Synopsys® tool to carry out a comparative study of the electrical behaviour of the metal–insulator–semiconductor Schottky diodes with different metal contacts (Ag, Au, Pt and Cr), on n-Si(100). We employed physics models to determine the Shockley–Read–Hall (SRH) and Auger recombination rates as a function of electric field profile in the depletion region. An insight was obtained as variation in the electric field at the metal–semiconductor interface due to work function variation affected the current mechanisms and recombination rates. The results were compared with the existing models. On the basis of analysis, merits and demerits of Schottky junctions formed due to these metals are discussed. The ideality factor of Au and Pt was found to be just around 2.0, while it was higher for Cr and Ag. However, the barrier height in the case of Cr was small, thus making it another possible metal layer for the Schottky contact. Similarly, SRH recombination rates were almost negligible for Au and Pt metal layer and became appreciable for Cr and much higher in Ag, making it not a good choice for the Schottky contact.

Work-Function Variation Effects of Tunneling Field-Effect Transistors (TFETs)

The work-function variation (WFV) effects of tunneling field-effect transistors (TFETs) are discussed for the first time. According to the 3-D device simulation results, TFETs are less immune to the WFV than metal–oxide–semiconductor FETs (MOSFETs) in terms of subthreshold swing <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex Notation="TeX">$(S)$</tex></formula> and threshold voltage <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$(V_{\rm th})$</tex></formula> . TFETs show <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">${\sim}{1.4}\times$</tex></formula> larger <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex Notation="TeX">$V_{\rm th}$</tex></formula> standard deviation <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$(\sigma V_{\rm th})$</tex> </formula> and <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">${\sim}{4.6}\times$</tex></formula> larger <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$S$</tex></formula> standard deviation <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$(\sigma S)$</tex></formula> than MOSFETs at high drain voltage <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$(V_{\rm D})$</tex></formula> . It is because TFET characteristics are mainly determined by WF values of metal grains near to the source region where band-to-band tunneling occurs.

Role of point defects and HfO2/TiN interface stoichiometry on effective work function modulation in ultra-scaled complementary metal–oxide–semiconductor devices

We investigate the physical properties of a portion of the gate stack of an ultra-scaled complementary metal-oxide-semiconductor (CMOS) device. The effects of point defects, such as oxygen vacancy, oxygen, and aluminum interstitials at the HfO2/TiN interface, on the effective work function of TiN are explored using density functional theory. We compute the diffusion barriers of such point defects in the bulk TiN and across the HfO2/TiN interface. Diffusion of these point defects across the HfO2/TiN interface occurs during the device integration process. This results in variation of the effective work function and hence in the threshold voltage variation in the devices. Further, we simulate the effects of varying the HfO2/TiN interface stoichiometry on the effective work function modulation in these extremely-scaled CMOS devices. Our results show that the interface rich in nitrogen gives higher effective work function, whereas the interface rich in titanium gives lower effective work function, compared to a stoichiometric HfO2/TiN interface. This theoretical prediction is confirmed by the experiment, demonstrating over 700 meV modulation in the effective work function.

Work function modulation of bilayer MoS2 nanoflake by backgate electric field effect

We report the work function modulation of bilayer MoS2 nanoflake induced by backgate electric filed. The Fermi level of bilayer MoS2 increased by 115 meV with the backgate bias larger than the threshold voltage. Carrier doping induced by the electric filed was responsible for the variation of work function of MoS2 nanoflake. Meanwhile, asymmetric contact potential drops at electrical contacts were observed, which was consistent with the asymmetric electrical output characteristics. Thermonic field emission theory was used to explain the carrier transport mechanism between Pt and bilayer MoS2, and the larger contact barriers led to the lower carrier mobility.

Analysis of Single-Trap-Induced Random Telegraph Noise and its Interaction With Work Function Variation for Tunnel FET

This paper analyzes the impacts of a single acceptor-type and donor-type interface trap induced random telegraph noise (RTN) on tunnel FET (TFET) devices and its interaction with work function variation (WFV) using atomistic 3-D TCAD simulations. Significant RTN amplitude (ΔID/ID) is observed for a single acceptor trap near the tunneling junction, whereas a donor trap is found to cause more severe impact over a broader region across the channel region. In addition, several device design parameters that can be used to improve TFET subthreshold characteristics (thinner equivalent oxide thickness or longer Leff) are found to increase the susceptibility to RTN. Our results indicate that under WFV, TFET exhibits weaker correlation between ION and IOFF than that in the conventional MOSFET counterpart. In the presence of WFV, the RTN amplitude can be enhanced or reduced depending on the type of the trap and the composition/orientation of metal-gate grain.

The Impact of Local Work Function Variations on Fermi Level Pinning of Organic Semiconductors

This photoemission study shows that the work function (Φ) of indium–tin-oxide (ITO) can be increased from 4.2 up to 6.5 eV upon the deposition of the molecular electron acceptors tetrafluoro-tetracyanoquinodimethane (F4TCNQ) and hexaazatriphenylene-hexacarbonitrile (HATCN). The evolution of sample Φ and the hole injection barrier upon subsequent deposition of the hole transport material N,N′-bis(1-naphthyl)-N,N′-diphenyl-1,1′-biphenyl-4,4′-diamine (α-NPD) was studied for different acceptor precoverages of ITO, corresponding to different initial Φ values. When Φ of the acceptor covered substrate exceeds a critical value Φcrit, the highest occupied molecular level of multilayer α-NPD is found to be pinned 0.5 eV below the Fermi level (EF). Noteworthy, Φcrit is found at 5.2 eV, which is 0.4 eV higher than expected for α-NPD (4.8 eV), and vacuum level alignment does not apply even before EF-pinning sets in. An electrostatic model that accounts for nonuniformity of the substrate at acceptor submonolayer covera...

Impact of Using Double-Patterning Versus Single-Patterning on Threshold Voltage $(V_{\rm TH})$ Variation in Quasi-Planar Tri-Gate Bulk MOSFETs

To experimentally investigate the impact of double-patterning and double-etching (2P2E) versus single-patterning and single-etching (1P1E) on the line-edge-roughness (LER) as well as on the LER-induced threshold-voltage ( <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</sub> ) variation in a multigate bulk device, quasi-planar tri-gate (QPT) bulk metal-oxide semiconductor field-effect transistors (MOSFETs) are fabricated by a 28-nm complementary metal-oxide-semiconductor (CMOS) technology. It is experimentally verified that the LER profile obtained through using the 2P2E 193-nm immersion photolithography technique has a relatively longer correlation length (i.e., lower spatial frequency) than that by the 1P1E technique, although they have a comparable root-mean-square deviation and fractal dimension. By using Monte Carlo simulations to analyze the random <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</sub> variations in the QPT bulk MOSFETs, we confirm that the 2P2E-LER-induced <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</sub> variation (versus the 1P1E-LER-induced <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</sub> variation) is suppressed by ~20% in terms of σ( <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</sub> ). However, the total <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</sub> variation in the QPT MOSFETs is slightly improved with the 2P2E technique, because the other variation sources such as random dopant fluctuation and work-function variation have still dominated the total <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">V</i> <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TH</sub> variation. To fully benefit from the 2P2E technique, the other random/intrinsic variations should be better controlled in the QPT CMOS technology.

Suppression of threshold voltage variability of double-gate fin field-effect transistors using amorphous metal gate with uniform work function

An amorphous TaSiN metal gate (MG) is introduced into double-gate fin field-effect transistors (FinFETs) to suppress work function variation (WFV) of the MG, which is a dominant source of threshold voltage (Vt) variability for MG FinFETs. Comparing with a poly-crystalline TiN gate, the TaSiN gate reduces Vt variation dramatically and thus records the smallest AVt value of 1.34 mV μm reported so far for the MG-FinFETs. By decomposing the variation source due to interface trap density, the WFV suppression using the amorphous MG is confirmed to be effective to achieve the well-suppressed variability of the MG-FinFETs.

Study of High-k/Metal-Gate Work-Function Variation Using Rayleigh Distribution

By using a Monte Carlo simulation for the stochastic distribution of grain sizes, the work-function variation (WFV) in high-k/metal-gate (HK/MG) is quantitatively and simply estimated with improved physical validity, with a Rayleigh distribution. Based on the Rayleigh distribution for the grain sizes, the WFV calculation for a TiN gate-stack is validated by previous experimental and simulation results. Additionally, a parameter for the WFV, i.e., ratio of the average grain size to the gate area (RGG), is suggested in this paper. This paves a new path to answer the following questions: 1) to what extent can the grain size of metal-gate materials be minimized to satisfy statistical targets? 2) to what extent can the physical gate area of metal oxide semiconductor field-effect transistors be scaled down whether the total variation is mainly limited by the WFV? Finally, it is concluded that a new HK/MG gate-stack should be developed to have the slope of <; 122 mV in the σ (WFV) versus RGG plot.

Investigation and Comparison of Work Function Variation for FinFET and UTB SOI Devices Using a Voronoi Approach

Using a novel Voronoi method that can provide a more realistic representation of metal-gate granularity, we investigate and compare the impact of work-function variation (WFV) on FinFET and ultrathin body (UTB) silicon-on-insulator (SOI) devices. Our study indicates that, for a given electrostatic integrity and total effective gate area, the FinFET device exhibits better immunity to WFV than its UTB SOI counterpart. We further show that, unlike other sources of random variation, the WFV cannot be suppressed by equivalent oxide thickness scaling.