V-band Power Amplifier Research Articles

A Reconfigurable Non-Uniform Power-Combining V-Band PA With +17.9 dBm Psat and 26.5% PAE in 16-nm FinFET CMOS

This article presents the design of a dual-mode V-band power amplifier (PA) that enhances the efficiency at power back-off (PBO) using load modulation. The PA utilizes a reconfigurable two-/four-way power combiner to enable two discrete modes of operation-full power and back-off power. The power combiner employs two techniques to further improve the PA efficiency at PBO: 1) usage of transformers with non-uniform turns ratios to reduce the difference in impedance presented to the PA cores between the two modes and 2) utilize a proposed switching scheme to eliminate the leakage inductance associated with the disabled path in back-off power mode (BPM). The two-stage PA achieves a peak gain of 21.4 dB with a fractional BW (fBW) of 22.6% (51-64 GHz). At 65 GHz, the PA has a P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">sat</sub> of +17.9 dBm with an OP <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1 dB</sub> of +13.5 dBm and a peak power added efficiency (PAE) of 26.5% in full-power mode. In BPM, the measured P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">sat</sub> , OP <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1 dB</sub> , and peak PAE are +13.8 dBm, +9.6 dBm, and 18.4%, respectively. The PAE is enhanced by 6% points at a 4.5-dB back-off. The PA is capable of amplifying a 6 Gb/s 16-QAM modulated signal with an EVM <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rms</sub> of -20.7 dB at an average P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">out</sub> /PAE of +13 dBm/13.6%, respectively. This PA was implemented in 16-nm FinFET, occupies a core area of 0.107 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , and operates under a 0.95-V supply.

A high gain V-band power amplifier for 5G applications

A high gain V-band power amplifier for 5G applications

A V-Band Power Amplifier With 23.7-dBm Output Power, 22.1% PAE, and 29.7-dB Gain in 65-nm CMOS Technology

This article presents a V-band three-stage power amplifier (PA) fabricated in 65-nm CMOS technology with remarkable performances of output power, efficiency, and power gain. A cascode amplifier is proposed to optimize the power performances at millimeter-wave (mm-wave). A current-combining radial structure transformer power combiner with a low impedance transmission line is used to combine four differential power cells efficiently and to further improve the output power. Meanwhile, two common-source (CS) amplifiers are cascaded to achieve high power gain. The measured results of the proposed PA demonstrate the saturated output power ( $P_{\mathrm {sat}}$ ) of 23.7 dBm, output 1-dB compression point ( OP 1 dB) of 19.9 dBm, peak power added efficiency (PAE) of 22.1%, and 29.7-dB power gain at 60 GHz with only 0.653-mm2 chip size.

A V-Band Power Amplifier With Integrated Wilkinson Power Dividers-Combiners and Transformers in 0.18-$\mu$ m SiGe BiCMOS

A high output power fully integrated V-band power amplifier (PA) is developed using a 0.18- $ {\mu }\text{m}$ SiGe BiCMOS technology. The developed PA makes use of four-way parallel power dividing and combining structures to feed and combine powers from four identical unit-PA cells, respectively. Especially, the parallel power combiner and divider are developed by integrating a low-loss wideband Wilkinson structure and two transformers connected in parallel, which achieve broad bandwidth and minimum phase and amplitude mismatches between ports. The unit-PA is designed as a pseudo-differential two-stage cascode amplifier, which employ transformers for both matching and impedance transformation. The PA achieves measured broadband small-signal gain of 19 dB at 60 GHz and 3-dB bandwidth of 56.8–67.5 GHz, which encompasses the overall unlicensed V-band spectrum (57–64 GHz). In addition, it delivers 18.8 dBm of saturated output power and 15.3 dBm of output 1-dB compressed power at 60 GHz. Across 55 to 65 GHz, the PA achieves a very flat power performance with maximum output power between 17–19.1 dBm.

An ultra-wideband CMOS PA with dummy filling for reliability

A V-band power amplifier in a bulk 65nm CMOS technology with a peak gain 14.5dB and 3-dB bandwidth of 28.8GHz (50.8–79.6GHz) is presented. The techniques to boost bandwidth and power efficiency are presented. In addition, the design of dummy filling to satisfy manufacturing density requirements while having negligible effects on performances is discussed in details. The PA features a three stage transformer coupled differential architecture with integrated input and output baluns on-chip. The PA achieves a measured saturated output power of 15.1dBm and output 1dB compression power of 12.9dBm at 65GHz. The peak power-added efficiency is 18.9%. The entire PA occupies area of 0.31mm2, while consuming 150mW from a 1.25V supply.

A broad-band V-band power amplifier using a reduced access-resistance transistor layout in 65-nm CMOS

To improve millimeter-wave amplifier performance, we propose a transistor layout that reduces the gate access resistance. The proposed layout trades overlap capacitance for reduced gate access resistance, as shown by transistor parameter extraction. The proposed transistor layout improves the maximum available power gain by 1.5 dB at 67 GHz. The extrapolated maximum frequency of oscillation (f max) also increases by 23 % from 91.3 to 112.5 GHz. Using the improved transistor layout, we design a V-band power amplifier that has enhanced performance. The power amplifier fabricated using the proposed transistor achieves 15.1 dB of small-signal gain, 16.5 GHz of 3-dB bandwidth, and an output power of 7.8 dBm at 61.5 GHz. Compared to an amplifier using conventional layout, the small-signal gain is improved by 3.7 dB and the output power is increased by 3 dBm at 61.5 GHz.

Phase-Delay Cold-FET Pre-Distortion Linearizer for Millimeter-Wave CMOS Power Amplifiers

A phase-delay cold-FET pre-distortion linearizer technique is proposed to improve the gain compensation ability compared with the conventional cold-FET pre-distortion linearizer. The gain expansion analysis of the power amplifier (PA) cascading with a pre-distortion linearizer and the comparison with the conventional linearizer and the proposed phase-delay linearizer are provided in this paper. To demonstrate the feasibility of this concept, a single-ended V-band cascode PA with the 90° phase-delay linearizer and a differential K-band common-source PA with the 180° phase-delay linearizer are developed to verify the characteristics. The V-band PA implemented in 90-nm CMOS process exhibits the output 1-dB compression power (OP1 dB) of 13.7 dBm and the power-added efficiency (PAE) at OP1 dB of 14.3%. The K-band PA implemented in 0.18-μm CMOS process demonstrates 17.5-dBm OP1 dB and 13.6% PAE at OP1 dB.

A high output power V-band GaAs HEMT push–pull power amplifier using meandering baluns technology

A broadband, high saturation output power 0.15-μm gate length GaAs pseudomorphic high-electron mobility transistor push-pull V-band power amplifier has been demonstrated using meandering balun designs. Two meandering low-loss planar three-coupled-line baluns were used to form push–pull mechanism for both stages. The meandering baluns provide 180° differential outputs from the applied single-ended input at the V-band and the size was reduced for 23% compared to traditional design. The proposed push–pull amplifier achieved a peak small-signal gain of 16.8 dB at 58 GHz, a 3 dB bandwidth of 55–62 GHz, and a peak power added efficiency of 13.8%.

A 60 GHz High Gain Transformer-Coupled Differential Cascode Power Amplifier in 65 nm CMOS

A fully differential high gain V-band three-stage transformer-coupled power amplifier (PA) is designed and implemented in 65 nm CMOS process. On-chip transformers which offer DC biasing for individual stages, extra stabilization mechanism, single-ended to differential conversion, and input/inter-stage/output matching are used to facilitate a compact amplifier design. The design and optimization methodologies of active and passive devices are presented. With a cascode configuration, the amplifier achieves a linear gain of 30.5dB centered at 63.5GHz and a -40dB reverse isolation under a 1V supply, which compares favorably to recent published V-band PAs. The amplifier delivers 9dBm and 13dBm saturation output power (Psat) under 1V and 1.5V supplies, respectively, and occupies a core chip area of 0.05mm2. The measurement results validate a high gain and area-efficient power amplifier design methodology in deep-scaled CMOS for applications in millimeter-wave communication.

A Millimeter-Wave System-on-Package Technology Using a Thin-Film Substrate With a Flip-Chip Interconnection

In this paper, a system-on-package (SOP) technology using a thin-film substrate with a flip-chip interconnection has been developed for compact and high-performance millimeter-wave (mm-wave) modules. The thin-film substrate consists of Si-bumps, ground-bumps, and multilayer benzocyclobutene (BCB) films on a lossy silicon substrate. The lossy silicon substrate is not only a base plate of the thin-film substrate, but also suppresses the parasitic substrate mode excited in the thin-film substrate. Suppression of the substrate mode was verified with measurement results. The multilayer BCB films and the ground-bumps provide the thin-film substrate with high-performance integrated passives for the SOP capability. A broadband port terminator and a V-band broad-side coupler based on thin-film microstrip (TFMS) circuits were fabricated and characterized as mm-wave integrated passives. The Si-bumps dissipate the heat generated during the operation of flipped chips as well as provide mechanical support. The power dissipation capability of the Si-bumps was confirmed with an analysis of DC-IV characteristics of GaAs pseudomorphic high electron-mobility transistors (PHEMTs) and radio-frequency performances of a V-band power amplifier (PA). In addition, the flip-chip transition between a TFMS line on the thin-film substrate and a coplanar waveguide (CPW) line on a flipped chip was optimized with a compensation network, which consists of a high-impedance and low-impedance TFMS line and a removed ground technique. As an implementation example of the mm-wave SOP technology, a V-band power combining module (PCM) was developed on the thin-film substrate with the flip-chip interconnection. The V-band PCM incorporating two PAs with broadside couplers showed a combining efficiency higher than 78%.

The effect of RF-driven gate current on DC/RF performance in GaAs pHEMT MMIC power amplifiers

This paper describes RF-driven gate current effects on the dc/RF performance of 0.15-/spl mu/m (gate length) 2-mil (substrate thickness) GaAs pseudomorphic high-electron mobility transistor (pHEMT) monolithic microwave integrated circuit power amplifiers (PAs). High gate current is generated in PAs under RF drive at room temperature. A long-term lifetest of PAs with various gate currents induced by RF drive was performed to investigate the effect of RF-driven gate current on dc/RF performance in GaAs pHEMT PAs. Accordingly, an empirical model was developed to predict the dc/RF performance of V-band PA modules by the end of life (EOL). This information is crucial for system engineers in order to budget sufficient output power so that the system can still maintain performance capability by EOL.

A high efficiency V-band monolithic HEMT power amplifier

We report the performance of a monolithic V-band power amplifier using 0.15-/spl mu/m double heterostructure pseudomorphic InGaAs/AlGaAs/GaAs HEMT's. The amplifier using a 400-/spl mu/m device driving a 2/spl times/400-/spl mu/m device. It has demonstrated output power of 313 mW (0.39 W/mm) with 8.95 dB power gain and 19.9% PAE at 59.5 GHz. These data represent the highest reported combination of output power, power gain, and power-added efficiency reported for a V-band monolithic power amplifier. >