Universal Logic Gate Research Articles

Design of ternary logic gates and circuits using GNRFETs

In this study, the design of digital logic gates and circuits in ternary logic is presented. The ternary logic is observed to be a better alternative to the traditional binary logic because it offers faster computations, smaller chip area, and lesser interconnects. Thus, it allows designing the low-complex, high-speed, and energy-efficient circuits in future digital design. A novel technique is proposed to design the ternary logic gates using multi-threshold graphene nanoribbon field-effect transistors (GNRFETs). The GNRFET threshold voltage is controlled by the width of the graphene nanoribbon, which is defined by the dimer lines number. Three different inverters are designed namely standard, positive, and negative inverters along with the basic and universal logic gates. Additionally, the ternary half adder and full adder are proposed that further helps to design the complex arithmetic circuits. All the proposed ternary logic circuits have been extensively simulated in SPICE for functional verification and performance analysis. The performance of the proposed ternary logic circuits is compared with the existing designs presented in the literature. The comparison results show that the propagation delay and circuit area of GNRFET-based circuits are reduced with an average of 41.3 and 64%, respectively, than the existing ternary circuits.

Instantaneous braids and Dehn twists in topologically ordered states

A defining feature of topologically ordered states of matter is the existence of locally indistinguishable states on spaces with non-trivial topology. These degenerate states form a representation of the mapping class group (MCG) of the space, which is generated by braids of defects or anyons, and by Dehn twists along non-contractible cycles. These operations can be viewed as fault-tolerant logical gates in the context of topological quantum error correcting codes and topological quantum computation. Here we show that braids and Dehn twists can in general be implemented by a constant depth quantum circuit, with a depth that is independent of code distance $d$ and system size. The circuit consists of a constant depth local quantum circuit (LQC) implementing a local geometry deformation of the quantum state, followed by a permutation on (relabelling of) the qubits. The permutation requires permuting qubits that are separated by a distance of order $d$; it can be implemented by collective classical motion of mobile qubits or as a constant depth circuit using long-range SWAP operations (with a range set by $d$) on immobile qubits. Applying these results to certain non-Abelian quantum error correcting codes demonstrates how universal logical gate sets can be implemented on encoded qubits using only constant depth unitary circuits.

Universal Logical Gates on Topologically Encoded Qubits via Constant-Depth Unitary Circuits.

A fundamental question in the theory of quantum computation is to understand the ultimate space-time resource costs for performing a universal set of logical quantum gates to arbitrary precision. Here we demonstrate that non-Abelian anyons in Turaev-Viro quantum error correcting codes can be moved over a distance of order of the code distance, and thus braided, by a constant depth local unitary quantum circuit followed by a permutation of qubits. Our gates are protected in the sense that the lengths of error strings do not grow by more than a constant factor. When applied to the Fibonacci code, our results demonstrate that a universal logical gate set can be implemented on encoded qubits through a constant depth unitary quantum circuit, and without increasing the asymptotic scaling of the space overhead. These results also apply directly to braiding of topological defects in surface codes. Our results reformulate the notion of braiding in general as an effectively instantaneous process, rather than as an adiabatic, slow process.

Nanoscale Side-Contact Enabled Three Terminal Pr0.7Ca0.3MnO3 Resistive Random Access Memory for In-Memory Computing

Resistive random-access memory (RRAM) devices that can execute logic are promising for in-memory computing. In state-of-the-art, a complementary resistive switch (CRS) bit-cell of two back-to-back bipolar RRAM shows a universal logic gate by multiple sequential write/compute operations using a resistance-based input/output (R-R logic) along with an extra read cycle. Here, we propose and experimentally demonstrate a three-terminal RRAM (3T-RRAM) to enable logic operations with voltage input and resistance output (V-R logic) in a single device and single write/compute cycle without a dedicated read cycle. Essentially, a nanoscale (~20nm) side-contact is added to a typical two-terminal Pt/Pr <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.7</sub> Ca <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.3</sub> MnO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> (PCMO)/W RRAM. As the PCMO RRAM is non-filamentary, all the terminals can act as in-out terminals. Hence, we utilize the 3 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rd</sup> terminal to read the state of the device while the other two terminals simultaneously performing the logic operation. Finally, we demonstrate the Implication (IMP) and converse IMP logic operations using 3T-RRAM. Such a device can enable area and energy-efficient in-memory computation.

Quantum supremacy in end-to-end intelligent IT. PT. III. Quantum software engineering – quantum approximate optimization algorithm on small quantum processors

Principles and methodologies of quantum algorithmic gate-based design on small quantum computer described. The possibilities of quantum algorithmic gates simulation on classical computers discussed. A new approach to a circuit implementation design of quantum algorithm gates for fast quantum massive parallel computing presented. SW &amp; HW support sophisticated smart toolkit of supercomputing accelerator of quantum algorithm simulation on small quantum programmable computer algorithm gate (that can program in SW to implement arbitrary quantum algorithms by executing any sequence of universal quantum logic gates) described

Fan-out enabled spin wave majority gate

By its very nature, Spin Wave (SW) interference provides intrinsic support for Majority logic function evaluation. Due to this and the fact that the 3-input Majority (MAJ3) gate and the inverter constitute a universal Boolean logic gate set, different MAJ3 gate implementations have been proposed. However, they cannot be directly utilized for the construction of larger SW logic circuits as they lack a key cascading mechanism, i.e., fanout capability. In this paper, we introduce a novel ladder-shaped SW MAJ3 gate design able to provide a maximum fanout of 2 (FO2). The proper gate functionality is validated by means of micromagnetic simulations, which also demonstrate that the amplitude mismatch between the two outputs is negligible, proving that an FO2 is properly achieved. Additionally, we evaluate the gate area and compare it with SW state-of-the-art and 15 nm CMOS counterparts working under the same conditions. Our results indicate that the proposed structure requires a 12× less area than the 15 nm CMOS MAJ3 gate and that at the gate level, the fanout capability results in 16% area savings, when compared to the state-of-the-art SW majority gate counterparts.

Magnetic Logic Gate Based on Polarized Spin Waves

Spin wave, the precession of magnetic order in magnetic materials, is a collective excitation that carries spin angular momentum. Similar to the acoustic or optical waves, the spin wave also possesses the polarization degree of freedom. Although such polarization degrees of freedom are frozen in ferromagnets, they are fully unlocked in antiferromagnets or ferrimagnets. Here we introduce the concept of magnetic gating and demonstrate a spin wave analog of the Datta-Das spin transistor in antiferromagnet. Utilizing the interplay between polarized spin wave and the antiferromagnetic domain walls, we propose a universal logic gate of pure magnetic nature, which realizes all Boolean operations in one single magnetic structure. We further construct a full functional 4-bit Arithmetic Logic Unit using only sixteen spin wave universal logic gates, operating in a weaving fashion as a Jacquard loom machine. The spin wave-based architecture proposed here also sets a model for the future energy efficient non-volatile computing, the distributed processing-in-memory computing, and the evolvable neuromorphic computing.

Logic Gates Based on Interaction of Counterpropagating Light in Microresonators

Optical logic has the potential to replace electronics with photonic circuits in applications for which optic-to-electronic conversion is impractical and for integrated all-optical circuits. Nonlinear optics in whispering gallery mode resonators provides low power, scalable methods to achieve optical logic. We demonstrate, for the first time, an all-optical, universal logic gate using counterpropagating light in which all signals have the same operating optical frequency. Such a device would make possible the routing of optical signals without the need for conversion into the electronic domain, thus reducing latency. The operating principle of the device is based on the Kerr interaction between counter-propagating beams in a whispering gallery mode resonator which induces a splitting between the resonance frequencies for the two propagating directions. Our gate uses a fused silica microrod resonator with a \textit{Q}-factor of $\SI{2e8}{}$. This method of optical logic gives a practical solution to the on-chip routing of light.

Quantum supremacy in end-to-end intelligent IT. Pt. I:Quantum software engineering–quantum gate level applied models simulators

Principles and methodologies of quantum algorithmic gates design for master course and PhD students in computer science, control engineering and intelligent robotics described. The possibilities of quantum algorithmic gates simulation on classical computers discussed. Applications of quantum gate of nanotechnology in intelligent quantum control introduced. Anew approach to a circuit implementation design of quantum algorithm gates for fast quantum massive parallel computing presented. The main attention focused on the development of design method of fast quantum algorithm operators as superposition, entanglement and interference, which are in general time-consuming operations due to the number of products that have performed. SW &amp; HW support sophisticated smart toolkit of supercomputing accelerator of quantum algorithm simulation on small quantum programmable computer algorithm gate (that can program in SW to implement arbitrary quantum algorithms by executing any sequence of universal quantum logic gates) described. As example, the method for performing Grover’s interference operator without product operations introduced. The background of developed information technology is the "Quantum / Soft Computing Optimizer" (QSCOptKBTM) SW based on soft and quantum computational intelligence toolkit.

Low power all optical switching and implementation of universal logic gates using micro-bubbles in semiconductor nanocrystal solutions

We describe optical switching in solutions of semiconductor nanocrystals illuminated by a 404 nm continuous wave laser source, driven by the formation of a micro-bubble of solvent vapor in the solution. Low boiling solvents such as hexane show an oscillatory modulation of transmitted light intensity (period ∼4 s) while solvents with intermediate boiling points such as toluene give a stable switching response. An on/off ratio of 83% is observed in the transmitted pump beam. Using this, a pump beam (404 nm, 80 mW continuous wave) was shown to reversibly switch the state of a probe laser (630 nm, 5 mW continuous wave). This switch thus serves as an optical analog of an electronic transistor and demonstrates the potential for all optical switching of low power light beams. Further, all optical universal logic gates, NAND and NOR, were also demonstrated using the micro-bubble switch.

Turing-complete mechanical processor via automated nonlinear system design.

Nanomechanical computers promise a greatly improved energetic efficiency compared to their electrical counterparts. However, progress towards this goal is hindered by a lack of modular components, such as logic gates or transistors, and systematic design strategies. This article describes a universal logic gate implemented as a nonlinear mass-spring-damper model, followed by an automated method to translate computations, expressed as source code of arbitrary complexity, into combinations of this basic building block. The proposed approach is validated numerically in two steps: First, a set of discrete models are generated from code. The models implement computations with increasing complexity, starting by a simple adder and ending in a eight-bit Turing complete mechanical processor. Then the models are forward integrated to demonstrate their computing performance. The processor is validated by executing the Erathostenes' sieve algorithm to mechanically compute prime numbers.

Universal logical gates with constant overhead: instantaneous Dehn twists for hyperbolic quantum codes

A basic question in the theory of fault-tolerant quantum computation is to understand the fundamental resource costs for performing a universal logical set of gates on encoded qubits to arbitrary accuracy. Here we consider qubits encoded with constant space overhead (i.e. finite encoding rate) in the limit of arbitrarily large code distancedthrough the use of topological codes associated to triangulations of hyperbolic surfaces. We introduce explicit protocols to demonstrate how Dehn twists of the hyperbolic surface can be implemented on the code through constant depth unitary circuits, without increasing the space overhead. The circuit for a given Dehn twist consists of a permutation of physical qubits, followed by a constant depth local unitary circuit, where locality here is defined with respect to a hyperbolic metric that defines the code. Applying our results to the hyperbolic Fibonacci Turaev-Viro code implies the possibility of applying universal logical gate sets on encoded qubits through constant depth unitary circuits and with constant space overhead. Our circuits are inherently protected from errors as they map local operators to local operators while changing the size of their support by at most a constant factor; in the presence of noisy syndrome measurements, our results suggest the possibility of universal fault tolerant quantum computation with constant space overhead and time overhead ofO(d/log⁡d). For quantum circuits that allow parallel gate operations, this yields the optimal scaling of space-time overhead known to date.

All-optical logic gate NAND using semiconductor optical amplifiers with simulation

Hybrid encoding technique for the representation of the binary states of information, four-wave mixing in semiconductor optical amplifier (SOA) as frequency generator and cross-polarization rotation effect in semiconductor optical amplifier as a frequency converter are used to design all-optical universal logic gate NAND. The devices can perform ultrafast operation and easily integrable. The simulated results of the proposed logic gate ensure feasibility of the proposals.

Design of a New Optimized Universal Logic Gate for Quantum-Dot Cellular Automata

In this paper, the design of a novel efficient QCA-based universal logic gate (ULG) is presented. Compact and efficient implementation layout with only one clock phase delay and also the implementation of the 13 standard functions without extra ULG or gate are the advantages of the proposed ULG. The results show that the proposed ULG is an efficient tool in designing any QCA circuit. Also, an accurate artificial neural network (ANN) model of the proposed ULG is presented. This model can be simply imported into any circuit simulators such as HSPICE, MATLAB Simulink and etc., for modeling and simulation of QCA circuits at the Gate level with high precision in a short time.

Design of all-optical universal logic gates using mode-conversion in single silicon microring resonator

All-optical universal logic gates are theoretically investigated and demonstrated in a single silicon microring resonator due to mode conversion. Mode conversion takes place at the switching speed of 0.2 ps and at ultrahigh quality factor (Q-factor) and requires low power. Simulated results obtained from the finite-difference-time-domain method verified our proposed model. The Q-factor for NOT, NAND, and NOR logic gates is noted as high as around 1500, 1500, and 2400, respectively. The design is simple and silicon-on-insulator compatible.

Fault-tolerant magic state preparation with flag qubits

Magic state distillation is one of the leading candidates for implementing universal fault-tolerant logical gates. However, the distillation circuits themselves are not fault-tolerant, so there is additional cost to first implement encoded Clifford gates with negligible error. In this paper we present a scheme to fault-tolerantly and directly prepare magic states using flag qubits. One of these schemes requires only three ancilla qubits, even with noisy Clifford gates. We compare the physical qubit and gate cost of our scheme to the magic state distillation protocol of Meier, Eastin, and Knill (MEK), which is efficient and uses a small stabilizer circuit. For low enough noise rates, we show that in some regimes the overhead can be improved by several orders of magnitude compared to the MEK scheme which uses Clifford operations encoded in the codes considered in this work.

Quantum computing with graphene plasmons

Among the various approaches to quantum computing, all-optical architectures are especially promising due to the robustness and mobility of single photons. However, the creation of the two-photon quantum logic gates required for universal quantum computing remains a challenge. Here we propose a universal two-qubit quantum logic gate, where qubits are encoded in surface plasmons in graphene nanostructures, that exploits graphene's strong third-order nonlinearity and long plasmon lifetimes to enable single-photon-level interactions. In particular, we utilize strong two-plasmon absorption in graphene nanoribbons, which can greatly exceed single-plasmon absorption to create a “square-root-of-swap” that is protected by the quantum Zeno effect against evolution into undesired failure modes. Our gate does not require any cryogenic or vacuum technology, has a footprint of a few hundred nanometers, and reaches fidelities and success rates well above the fault-tolerance threshold, suggesting that graphene plasmonics offers a route towards scalable quantum technologies.

Reconfigurable Logic Gates with in‐Plane Magnetic Tunnel Junctions Representing Full Boolean Functions

Logic functions implemented by input terminal extension are proposed, which is uniquely achievable in magnetic tunnel junctions (MTJs). With two inputs assigned by the two independent physical variables of magnetic field and spin transfer torque for each terminal, 14 Boolean functions, except XNOR, and XOR, are found among the full 16 Boolean functions, which compute every mathematics and logic algebra. Logic gates of AND, NAND, OR, NOR, two NOTs, two Nulls, True, False, two implementation logics (IMPs), and two not implementation logics (NIMPs) acting as logical operators in computing circuit are also presented with supplementary circuits for amplification to achieve cascading operations where the output of a logic gate directly becomes the input of the next logic gate. The proposed logic gate not only completes the full set of 16 Boolean operators with the sequential wiring of universal logic gates (NAND and NOR) to build XNOR and XOR gates, but also becomes a reconfigurable logic element where multiple operations are performed in a single gate.

Encoding a qubit in a trapped-ion mechanical oscillator.

The stable operation of quantum computers will rely on error correction, in which single quantum bits of information are stored redundantly in the Hilbert space of a larger system. Such encoded qubits are commonly based on arrays of many physical qubits, but can also be realized using a single higher-dimensional quantum system, such as a harmonic oscillator1-3. In such a system, a powerful encodinghas been devised based on periodically spaced superpositions of position eigenstates4-6. Various proposals have been made for realizing approximations to such states, but these have thus far remained out of reach7-11. Here we demonstrate such an encoded qubit using a superposition of displaced squeezed states of the harmonic motion of a single trapped 40Ca+ ion, controlling and measuring the mechanical oscillator through coupling to an ancillary internal-state qubit12. We prepare and reconstruct logical states with an average squared fidelity of 87.3±0.7 per cent. Also, we demonstrate a universal logical single-qubit gate set, which we analyse using process tomography. For Pauli gates we reach process fidelities of about 97 per cent, whereas for continuous rotations we use gate teleportation and achieve fidelities of approximately 89 per cent. This control method opens a route for exploring continuous variable error correction as well as hybrid quantum information schemes using both discrete and continuous variables13. The code states also have direct applications in quantum sensing, allowing simultaneous measurement of small displacements in both position and momentum14,15.

Theoretical approach of developing a frequency-encoded reversible optical arithmetic and logic unit using semiconductor optical amplifier-based polarization switches

The reversible logic gate is a great choice for designing various types of optical processors due to so many advantageous aspects of it; such as low power consumption and the ability of data recovery. At first, the optical circuit of Fredkin gate, a universal reversible logic gate, is designed theoretically using a semiconductor optical amplifier (SOA)-based polarization switch, and the performance of the circuit is studied using simulated results. The frequency-encoded binary data are used to execute the operations. Subsequently, we propose the techniques of developing NOT, AND, OR, EX-OR, EX-NOR gates, and full adder circuit using reversible Fredkin gates. Finally, we develop an optical arithmetic logic unit using the proper combination of reversible Fredkin gates. The theory of nonlinear polarization rotation of the probe beam in the presence of the pump beam in SOA is adopted here. The simulated input–output spectra of the optical circuits enhance the admissibility of the proposed concept.