Ultra Large Scale Integrated Circuits Research Articles

Evaluation of Property Changes due to Radiation, Radicals, and Ions on Organic Low-k Films in H2/N2 Plasma Etching

An organic low-dielectric constant (low-k) film, polyallylene (PAr), is a prospective candidate for low-k interlayer films for ultra large-scale integrated circuits (ULSIs). PAr films are caused the property changes such as increases of the dielectric constant during plasma etching and ashing. In a previous study, we have developed a novel technique called pallet for plasma evaluation (PAPE) for separately evaluating the property changes caused by radiation, radicals, and ions in process plasmas and clarified the mechanism of plasma-induced property changes on low-k porous SiOCH films. In this study, using the PAPE technique, we investigated the changes on the surface of a PAr film due to radiation, radicals, radiation with radicals, and ions in dual-frequency capacitively coupled H2/N2 plasmas. The property changes were characterized by ellipsometry and X-ray photoelectron spectroscopy. The property changes on the PAr films due to radiation and radicals were considerably smaller compared to those on the low-k porous SiOCH films.

Fabrication and diffusion barrier properties of nanoscale Ta/Ta-N bi-layer

One of the most important processes in Cu metallization for ultra large scale integrated circuits (ULSI) is to fabricate better diffusion barrier. In this paper, Ta/Ta-N films were fabricated by dc magnetron reactive sputtering (DCMS) in N 2/Ar ambient, then Cu/Ta/Ta-N/Si multi-structures were prepared in suite. The thin-film samples were rapid thermal annealed (RTA) at variational temperatures in N 2 ambient. Alpha-Step IQ Profiler, four-point probe (FPP) sheet resistance measurer, atomic force microscope (AFM), scanning electron microscope (SEM), X-ray diffraction (XRD) and tape test were used to characterize the microstructure and diffusion properties of the thin-films. The results show that the nanoscale Ta/Ta-N thin-films have smooth surface, and the thermal stability and barrier performance are good. After 600 °C/300 s RTA, Ta (40 nm)/Ta-N (60 nm) thin-films can effectively block against Cu diffusion and keep good adhesion strength with Cu films. After higher temperature RTA process, Cu atoms penetrated through the barrier and reacted with silicon, the barrier fail.

Characterizations of Boron Carbon Nitride and Boron Carbide Films Synthesized by PECVD

AbstractThin films of boron carbon nitride (BCN) and boron carbide (BC) were synthesized by plasma enhanced chemical vapor deposition (PECVD) using two different reactant chemistries: (i) N,N’,N” – trimethylborazine (TMB); (ii) dilute diborane (5% in Ar) and hydrocarbon as precursor materials. Fourier transform infrared spectroscopy (FTIR), Raman spectroscopy, Nano-Indentor, Flexus stress instrument and x-ray photoelectron spectroscopy were used to study the deposited films. The BC films are much more stable than BCN films under high humidity (100%) environment. Both BCN and BC films are very stable under atmospheric conditions. A high compressive stress of -4.2 GPA was achieved by conventional PECVD, which show promising applications in high performance ultra large-scale integrated circuit (ULSI) devices.

The effect of oxygen content on bonding configuration and properties of low- k organosilicate glass dielectric film

Low- k organosilicate glass (SiOC:H) film as inter-metal dielectric (IMD) layer in advanced ultra-large-scale integrated circuits (ULSI) was deposited by plasma-enhanced chemical vapor deposition (PECVD) with trimethylsilane (TMS) and oxygen. The effects of oxygen on the bonding configuration, optical and electrical properties were investigated by adjusting TMS/O 2 gas ratios. The absorbance spectra of Fourier transform infrared (FT-IR) spectroscopy shows that the frequency of the Si–O stretching vibration mode shifted to a lower wave number (red shift) with an increase in the ratio of TMS/O 2. The related elements contented in SiOC:H films calculated from FT-IR spectra coincided with the analysis of Rutherford backscattering spectroscopy. Results of optical and electrical properties indicated that a lower refractive index (RI), a higher strength of breakdown voltage, a lower dielectric constant, and a lower leakage current density were achieved at lower TMS/O 2 gas ratios.

Maintaining Cu metal integrity on low-k IMDs with a nanometer thick a-SiC:H film obtained by HWCVD

Hydrogenated amorphous silicon carbon (a-SiC:H) ultra thin films obtained by Hot wire chemical vapor deposition (HWCVD) have been shown to act as efficient diffusion barriers for copper on inter metal dielectric (IMD) layers which are of great significance for ultra-large scale integration (ULSI) circuits. In this work, we have studied the influence of the a-SiC:H barrier layer obtained by HWCVD which has implications towards issues related to the resistance to electromigration of Cu in the low dielectric (low- k) hydrogen silsesquioxane (HSQ) film. The presence of the ultra thin a-SiC:H film maintains the integrity of the Cu metal not only by suppressing Cu diffusion but also by increasing its crystallinity, which would have implications with respect to the mean time to failure (MTF) arising from metal electromigration. Though, we demonstrate this aspect on the low- k (HSQ)/Cu system, this should yield similar benefits for other low- k dielectric materials too.

Synthesis and characterization of hafnium oxide and hafnium aluminate ultra-thin films by a sol–gel spin coating process for microelectronic applications

Currently there are intense industry-wide efforts in searching for new high dielectric constant (high- k) materials for use in future generations of ultra-large scale integrated circuits (ULSI). There are number of requirements for the new high- k materials, such as high dielectric constant, thermal stability (400 °C or higher), high mechanical strength, and good adhesion to neighboring layers. Oxide spinels comprise a very large group of structurally related compounds many of which are of considerable technological significance. Spinels exhibit a wide range of electronic and magnetic properties in particular nickel, hafnium, cobalt, containing spinels. In the present investigation, crack free, dense polycrystalline monoclinic structure of pure HfO 2, and Al 2HfO 5 ultra-thin films have been prepared by a simple and cost effective sol–gel spin coating method. The formation of the monoclinic HfO 2 phase at 600 °C and complete formation of the single phase Al 2HfO 5 at 800 °C has been reported. The composition of the annealed films has been measured and found to be 70 at.% of O, 30 at.% of Hf for HfO 2 and 22 at.% of Al, 12 at.% of Hf and 66 at.% of O for Al 2HfO 5 films, which are close to the stoichiometry of the HfO 2 and Al 2HfO 5 thin films.

GeO 2 based high k dielectric material synthesized by sol–gel process

Recently, there has been lot of research on new high dielectric constant (high k) materials for use in future generations of ultra-large scale integrated circuits (ULSI). There are number of requirements for the new high k materials, such as high dielectric constant, thermal stability (400 °C or higher), high mechanical strength, and good adhesion to neighboring layers. Keeping in view the properties required for the replacement of existing SiO 2 dielectrics, new high k dielectric material based on GeO 2 has been synthesized. Polycrystalline GeO 2 thin films have been deposited by simple, and cost effective sol–gel spin coating process. The obtained xerogel films of germanium oxide have been annealed at 400 °C, 600 °C and 800 °C for 3 h in argon atmosphere. Elemental composition, morphology, and phase analysis have been measured by employing X-ray photoelectron spectroscopy, scanning electron microscopy, and X-ray diffraction techniques, respectively. The formation of the hexagonal GeO 2 phase at and above 400 °C has been reported. The composition of the annealed films have been measured and found to be 68 at.% of O, 32 at.% of Ge for GeO 2, which are close to the stoichiometry of the GeO 2.

Dispersion feature in arbitrary direction of surface acoustic wave applied to property characterization of ultra-large-scale integrated circuit interconnect films

The ultrasonic surface acoustic wave (SAW) technique is becoming attractive for accurate and nondestructive property determination for thin low-k films employed in the modern ultra-large-scale integrated circuit (ULSI). In this paper, the dispersive characteristics of SAW propagating along arbitrary directions on the layered films deposited on Si(100) were studied in detail. The computation time was reduced greatly by appling coodinate transformation. The calculation of 9×9 Christoffel matrix was simplified to 6×6 matrix for one film layer structure, and from 15×15 matrix to 10×10 matrix for two-layered structure. This work will benefit the on-line test of low-k film properties during ULSI fabrication. Furthermore, the limitation on the propagating direction of SAW can be eliminated in the measurement.

Large modification of crystal–melt interface shape during Si crystal growth by using electromagnetic Czochralski method (EMCZ)

Large-diameter, high-quality Si wafers are required for further advance of ultra large-scale integrated circuit (ULSI) device processing. Therefore, a new crystal growth technique is needed to obtain large-diameter, high-quality Si crystals containing homogeneously distributed oxygen and reduction of grown-in defect density in the concentration required for ULSI device processing. To address this requirement, we developed a new crystal growth technique using electromagnetic force (EMF), which we call the electromagnetic Czochralski (EMCZ) method. Using the EMCZ method, we were able to grow defect-free Si crystals of 200 mm diameter with a higher pulling rate rather than those grown under the conventional CZ crystal growth conditions. High-speed pulling of defect-free crystals by the EMCZ method is due to large modifications of the crystal–melt interface. In this method, the interface shape is largely modified to the upward convexly toward the crystal. The large upward convex shape of the crystal–melt interface during EMCZ growth results from the temperature distribution at the interface by the controlled melt flow generated by the EMF. We confirmed this large modification of interface shape by experiments and numerical simulations. The mechanism of this modification of interface shape is discussed from the viewpoint of melt flow around the growing interface.

Superior thermal stability of Ta/TaN bi-layer structure for copper metallization

Ta/TaN bi-layer structure is currently used in the ultra-large scale integrated circuits (ULSI) interconnect as barrier for copper because of its good adhesion to both SiO 2 and Cu wire. In this work Cu, Ta and TaN layers were prepared by sputtering technology. X-ray diffraction, Auger electron spectroscopy (AES), X-ray photoelectron spectroscopy (XPS) as well as transmission electron microscopy (TEM) were applied to characterize the thin film thermal stability and microstructure evolution. The results show that the Ta/TaN bi-layer structure has much better diffusion barrier properties than pure Ta or pure TaN film. A mechanism was proposed to explain the better thermal stability of the Ta/TaN bi-layer structure based on the correlation between TaN layer thickness and TaN crystallization kinetics. The microstructure evolution for Ta/TaN bi-layer structure during annealing was described.

Development of Micro-Assembling Technology for Fabrication of Large Size Liquid Crystal Displays

A liquid crystal display (LCD) has two substrates sandwiching a liquid crystal layer. One is a pixel-controlling substrate (PCS or thin-film-transistor-array substrate), and the other is a color filter substrate. This paper is to study the feasibility of a new technology for making PCS. In the technology, many small crystalline silicon ultra large scale integrated circuits (ULSI) chips with a size of a few hundred µm are used for pixel control instead of using the conventional amorphous-silicon thin-film transistor. A new assembling technology for treating µm-size chips, micro-assembling technology (MAT), is particularly investigated as a technology for depositing almost a million of ULSI chips onto proper positions on the substrate. Processes to fabricate PCS by MAT are also investigated. It is found that when the diagonal size of an LCD exceeds 50–100 in., the present technology becomes realistic technically and economically.

A 2.4 GHz Differential Wavelet Generator in 0.18 µm Complementary Metal–Oxide–Semiconductor for 1.4 Gbps Ultra-Wideband Impulse Radio in Wireless Inter/Intra-Chip Data Communication

Ultra-wideband impulse based radio systems use Gaussian monocycle pulses as transmitted signals at the transmitting end and as template signals at the receiving end. In this paper we present a new fully integrated differential Gaussian monocycle pulse generator in 0.18 µm complementary metal–oxide–semiconductor (CMOS) technology. Here the Gaussian monocycle pulse is generated from triangular shaped pulse by a single differentiator circuit and it is then converted into differential form by using a single input to dual output amplifier. The developed circuit occupies a small area of 0.06 mm2 and consumes a total power of 44 mW at 1.8 V. The transmission of the generated differential Gaussian monocycle pulse at a rate of 1.4 Gbps through integrated dipole antenna in the same Si-substrate for intrachip communication in future ultralarge scale integrated circuit (ULSI) is verified by simulation and results are presented here.

Design of experiment (DOE) method considering interaction effect of process parameters for optimization of copper chemical mechanical polishing (CMP) process

Chemical mechanical polishing (CMP) has been widely accepted for the metallization of copper interconnection in ultra-large scale integrated circuits (ULSIs) manufacturing. It is important to understand the effect of the process variables such as turntable speed, head speed, down force and back pressure on copper CMP. They are very important parameters that must be carefully formulated to achieve desired the removal rates and non-uniformity. Using a design of experiment (DOE) approach, this study was performed investigating the interaction effect between the various parameters as well as the main effect of the each parameter during copper CMP. A better understanding of the interaction behavior between the various parameters and the effect on removal rate, non-uniformity and ETC (edge to center) is achieved by using the statistical analysis techniques. In the experimental tests, the optimized parameters combination for copper CMP which were derived from the statistical analysis could be found for higher removal rate and lower non-uniformity through the above DOE results.

Behavior of Hydrogen-Terminated Si(111) Surface in Oxygen-Dissolved NH4F Solution with or without Cu(II) Ions

E-mail: cwlee@korea.ac.krReceived August 2, 2005Key Words : Si(111), Oxygen Am, monium fluoride Cu, (II), STMIn the conjunction with the development of ultra-large-scale integration circuits (ULSI), the skill of the control ofcontaminants in cleansing solutions and also the technologyfor making a flat hydrogen-terminated Si single crystalsurface should be developed in the near future.

The removal of silicon and boron from ultra-pure water by electrodeionization

The method for removal of silicon and boron from ultra-pure water by EDI (electrodeionization) was investigated. By investigating electric current, conductivity, flow of feed water in dilute and concentrate chambers, and pH value, the optimal conditions for removal of silicon and boron are obtained. With 1000 μg/L SiO 2 in feed water, the concentration of silicon in product water can be decreased to 2.66 μg/L, which is currently the best result in our country. With 50 μg/L boron in feed water, less than 1 μg/L boron in product water can be obtained. All these results meet the requirements for ULSI (ultra large scale integrated circuits) (silicon: ≤3 μg/L, boron: ≤1 μg/L).

Various applications of silicon nitride by catalytic chemical vapor deposition for coating, passivation and insulating films

Various applications of silicon nitride (SiN x ) films prepared by catalytic chemical vapor deposition (Cat-CVD) as coating, passivation and insulating films are reviewed. Characteristic features of SiN x films by Cat-CVD are dense (low hydrogen content), low wet-etch rate, low oxygen or water-vapor transmission rate even when prepared at low temperatures below 300 °C and low stress. Therefore, SiN x films prepared by Cat-CVD are suitable as coating and passivation films for electronic devices, mechanical parts and plastic films. SiN x films prepared by Cat-CVD are, of course, also applicable as insulating films used in ultralarge-scale integrated circuits (ULSIs) and thin-film transistors (TFTs). These various applications are introduced, along with a summary of the fundamental properties of the SiN x films and a possible explanation as to why such dense films are obtained even at low temperatures.

High-performance, tensile-strained Ge p-i-n photodetectors on a Si platform

We demonstrate a high-performance, tensile-strained Ge p-i-n photodetector on Si platform with an extended detection spectrum of 650–1605 nm and a 3 dB bandwidth of 8.5 GHz measured at λ=1040nm. The full bandwidth of the photodetector is achieved at a low reverse bias of 1 V, compatible with the low driving voltage requirements of Si ultralarge-scale integrated circuits. Due to the direct bandgap shrinkage induced by a 0.20% tensile strain in the Ge layer, the device covers the entire C band and a large part of the L band in telecommunications. The responsivities of the device at 850, 980, 1310, 1550, and 1605 nm are 0.55, 0.68, 0.87, 0.56, and 0.11A∕W, respectively, without antireflection coating. The internal quantum efficiency in the wavelength range of 650–1340 nm is over 90%. The entire device was fabricated using materials and processing that can be implemented in a standard Si complementary metal oxide semiconductor (CMOS) process flow. With high speed, a broad detection spectrum and compatibility with Si CMOS technology, this device is attractive for applications in both telecommunications and integrated optical interconnects.

Molecular-dynamics study of interfacial diffusion between high-permittivity gate dielectrics and germanium substrates

The stability of interfaces with germanium, which has recently been discussed as a replacement for silicon in ultra-large-scale integrated circuits (ULSIs), was studied. Interfacial oxygen diffusion from high-permittivity gate dielectrics (ZrO2 and HfO2) into germanium substrates must be suppressed to prevent the formation of interfacial layers between the gate dielectrics and the germanium substrates. Oxygen diffusion was simulated through a molecular-dynamics technique that takes into account many-body interactions and charge transfer between different elements. The simulation results show that the addition of yttrium is effective in suppressing interfacial oxygen diffusion at the ZrO2/germanium interfaces. On the other hand, the addition of yttrium is not effective in suppressing interfacial oxygen diffusion at the HfO2/germanium interfaces. The results also show that the diffusion at the ZrO2/Ge(111) and HfO2/Ge(111) interfaces is much more suppressed than the diffusion at the ZrO2/Ge(001) and HfO2/Ge(001) interfaces.

Transmission Characteristics of Gaussian Monocycle Pulses for Inter-Chip Wireless Interconnections Using Integrated Antennas

Performance of integrated dipole antennas on Si substrates was investigated for inter-chip signal transmission in wireless interconnections for Si ultra-large scale integrated circuits (ULSI). Linear dipole antennas 4 mm long were fabricated on P-type Si substrates with a resistivity of 10 Ω·cm in an inter-chip stacked structure. Inter-chip antenna transmission gains were measured for the dipole antennas at a vertical distance of 2.86 mm and a horizontal distance of 3 mm when Si substrates with a resistivity of 2.29 kΩ·cm were inserted. A transmission gain of -30 dB and no dependence on vertical distance were observed. Gaussian monocycle pulses with a pulse width of 70 psec could be transmitted successfully in the inter-chip stacked structure. Antenna transmission gain and peak-to-peak voltage between Si chips were improved using a high resistivity Si substrate.

Characterization of Photosensitive Low-k Films Using Electron-Beam Lithography

Characteristics of photosensitive low- methylsilsesquioxane (MSQ) were investigated by the use of electron-beam lithography. Photosensitive low- MSQ makes it possible to realize via and trench structures for Cu damascene technology without dry etching processes in the multilevel interconnect integration of ultralarge scale-integrated circuits. In this paper the dependences of critical dimensions of developed patterns on exposure dose and hold time after exposure were investigated. Consequently the aspect ratio of the developed trench structure of 3.9 and the minimal feature size of were achieved.