TFET Research Articles

Highly sensitivity Non-Uniform Tunnel FET based biosensor using source engineering

The manuscript proposes a novel dielectrically modulated Non-Uniform Tunnel FET based Biosensor for the detection of charged and neutral biomolecules. In this work, the reliability analysis of Dual Material Source based Non-Uniform Tunnel FET Biosensor has been performed. The design of Non-Uniform Tunnel FET and doping profile at the tunneling junction is accountable for the improved sensitivity. The response of the proposed biosensor has been analysed in terms of threshold voltage sensitivity, ON-OFF current ratio sensitivity and drain current sensitivity by using Sentaurus TCAD device simulator. The investigation includes analysis of neutral, positive and negatively charged Bio-analytes at immobilization layer for different cases of dielectrics. In case of positively charged Bio-analytes, it has been observed that the proposed biosensor can obtain the highest sensitivities of 100 mV, 7.9 × 106, 451 for threshold voltage, ON-OFF current ratio, and drain current sensitivities, respectively. Furthermore, the performance and reliability assessment of the biosensor have been considered using the appearance of steric hindrance in different patterns and temperature fluctuations in the wide range from 200 K to 400 K.

Performance Assessment of a Junctionless Heterostructure Tunnel FET Biosensor Using Dual Material Gate

Biosensors based on tunnel FET for label-free detection in which a nanogap is introduced under gate electrode to electrically sense the characteristics of biomolecules, have been studied widely in recent years. In this paper, a new type of heterostructure junctionless tunnel FET biosensor with an embedded nanogap is proposed, in which the control gate consists of two parts, namely the tunnel gate and auxiliary gate, with different work functions; and the detection sensitivity of different biomolecules can be controlled and adjusted by the two gates. Further, a polar gate is introduced above the source region, and a P+ source is formed by the charge plasma concept by selecting appropriate work functions for the polar gate. The variation of sensitivity with different control gate and polar gate work functions is explored. Neutral and charged biomolecules are considered to simulate device-level gate effects, and the influence of different dielectric constants on sensitivity is also researched. The simulation results show that the switch ratio of the proposed biosensor can reach 109, the maximum current sensitivity is 6.91 × 102, and the maximum sensitivity of the average subthreshold swing (SS) is 0.62.

Ferroelectric-gate tunnel field-effect transistor one-transistor ternary contents addressable memory

In the era of ‘big data’, the von Neumann architecture has significant energy consumption and latency penalties for data transfer between memory and processor. However, ternary content addressable memories (TCAMs) enable fast and energy-efficient operation by performing a parallel search for given data and returning information about whether it matches. In this study, a single transistor (1T) ferroelectric-gate tunnel FET (FeTFET) was introduced for TCAM operations, and its functionality was verified through technology computer-aided design (TCAD) simulations. The FeTFET has intrinsic directional currents due to its unique p–i–n structure. Also, the transfer curve of the FeTFET can be shifted in both directions depending on the polarization state of the ferroelectric material. By combining these properties of the FeTFET, it was confirmed that stable search operations can be performed for stored logic states. Thus, compared to conventional TCAM cell that use two or more transistors, it is expected that the proposed 1T-TCAM cell can store and search more bits in the same area.

Novel SiGe/Si Heterojunction Double-Gate Tunneling FETs with a Heterogate Dielectric for High Performance.

In this paper, a new SiGe/Si heterojunction double-gate heterogate dielectric tunneling field-effect transistor with an auxiliary tunneling barrier layer (HJ-HD-P-DGTFET) is proposed and investigated using TCAD tools. SiGe material has a smaller band gap than Si, so a heterojunction with SiGe(source)/Si(channel) can result in a smaller tunneling distance, which is very helpful in boosting the tunneling rate. The gate dielectric near the drain region consists of low-k SiO2 to weaken the gate control of the channel-drain tunneling junction and reduce the ambipolar current (Iamb). In contrast, the gate dielectric near the source region consists of high-k HfO2 to increase the on-state current (Ion) through the method of gate control. To further increase Ion, an n+-doped auxiliary tunneling barrier layer (pocket)is used to reduce the tunneling distance. Therefore, the proposed HJ-HD-P-DGTFET can obtain a higher on-state current and suppressed ambipolar effect. The simulation results show that a large Ion of 7.79 × 10-5 A/μm, a suppressed Ioff of 8.16 × 10-18 A/μm, minimum subthreshold swing (SSmin) of 19 mV/dec, a cutoff frequency (fT) of 19.95 GHz, and gain bandwidth product (GBW) of 2.07 GHz can be achieved. The data indicate that HJ-HD-P-DGTFET is a promising device for low-power-consumption radio frequency applications.

Si–Ge based vertical tunnel field-effect transistor of junction-less structure with improved sensitivity using dielectric modulation for biosensing applications

A dielectric modulation strategy for gate oxide material that enhances the sensing performance of biosensors in junction-less vertical tunnel field effect transistors (TFETs) is reported. The junction-less technique, in which metals with specific work functions are deposited on the source region to modulate the channel conductivity, is used to provide the necessary doping for the proper functioning of the device. TCAD simulation studies of the proposed structure and junction structure have been compared, and showed an enhanced rectification of 104 times. The proposed structure is designed to have a nanocavity of length 10 nm on the left- and right-hand sides of the fixed gate dielectric, which improves the biosensor capture area, and hence the sensitivity. By considering neutral and charged biomolecules with different dielectric constants, TCAD simulation studies were compared for their sensitivities. The off-state current I OFF can be used as a suitable sensing parameter because it has been observed that the proposed sensor exhibits a significant variation in drain current. Additionally, it has been investigated how positively and negatively charged biomolecules affect the drain current and threshold voltage. To explore the device performance when the nanogaps are fully filled, half filled and unevenly filled, extensive TCAD simulations have been run. The proposed TFET structure is further benchmarked to other structures to show its better sensing capabilities.

Experimental investigation of a novel junction-modulated hetero-layer tunnel FET with the striped gate for low power applications

Experimental investigation of a novel junction-modulated hetero-layer tunnel FET with the striped gate for low power applications

Analytical drain current model development of twin gate TFET in subthreshold and super threshold regions

In this work, an analytical model for a twin gate Tunnel Field Effect Transistor's drain current operating in the subthreshold and superthreshold regions is proposed. Using this drain current model, the ratio of transconductance to drain current, a crucial metric for the integrated analog circuit design technique, has been retrieved. Due to the simplicity of this approach, it may be quickly implemented for any type of dual gate TFETs by adjusting a few parameters. Comparing the drain current calculated by this analytical model to the drain current simulated by the 2D-Sentaurus TCAD software demonstrates the Tunnel FET's authenticity. The proposed analytical method can be used to achieve the appropriate transconductance for operating Tunnel FETs in the gigahertz region with very low milliwatt power consumption.

Design and Investigation of High Performance Magnesium Silicide Based Face Tunnel Field Effect Transistor

Design and Investigation of High Performance Magnesium Silicide Based Face Tunnel Field Effect Transistor

A Comparative Analysis of Cavity Positions in Charge Plasma based Tunnel FET for Biosensor Application

This work reports a comparative analysis of different cavity positions in Charge Plasma-based Tunnel Field Effect Transistor (CP TFET) for Biosensor Application. In CP TFET, we have created a nanogap cavity at three different positions i.e. the Source, Gate, and Drain. The nanogap cavity formed at Source, Gate, and Drain is called Source Cavity, Gate Cavity, and Drain Cavity, respectively. The intrinsic properties of biomolecules, such as dielectric constant (K) and charge density (o̧), have been utilized to detect the biomolecules in the cavity. The source and drain region are formed by appropriate metal work functions using the charge plasma concept. The presence of biomolecules in the cavity increases the effective capacitance of the device. As a result, a high electric field generates under the cavity region. Consequently, due to large band bending, thinning of tunneling width occurred. Therefore, the increase in tunneling rate enhances the drive current of the device. The device physics has been analyzed using energy band variation, surface potential, electron tunneling rate, electric field, and transfer characteristics for different biomolecules. In addition, the Sensitivity of the device at different cavity positions has been investigated and compared in terms of ION, ION/IOFF, Vth, and SS. Furthermore, the sensitivity of the proposed device is compared with the existing literature and the possible fabrication process flow of the device has also been presented in this work.

Modeling and Simulation Investigation of Ferroelectric-Based Electrostatic Doping for Tunnelling Field-Effect Transistor

In this paper, a novel ferroelectric-based electrostatic doping (Fe-ED) nanosheet tunneling field-effect transistor (TFET) is proposed and analyzed using technology computer-aided design (TCAD) Sentaurus simulation software. By inserting a ferroelectric film into the polarity gate, the electrons and holes are induced in an intrinsic silicon film to create the p-source and the n-drain regions, respectively. Device performance is largely independent of the chemical doping profile, potentially freeing it from issues related to abrupt junctions, dopant variability, and solid solubility. An improved ON-state current and ION/IOFF ratio have been demonstrated in a 3D-calibrated simulation, and the Fe-ED NSTFET's on-state current has increased significantly. According to our study, Fe-ED can be used in versatile reconfigurable nanoscale transistors as well as highly integrated circuits as an effective doping strategy.

Pocketed dual metal gate TFET: Design and simulation

In this work, design and simulation of two novel tunnel field effect transistors with improved DC and radio frequency (RF) performance has been conducted. The first proposed tunnel field effect transistor (TFET) employs a highly doped n + pocket in the intrinsic channel along with a combination of stacked oxide (silicon dioxide and hafnium oxide). This configuration helps in the enhancement of tunneling at the source/channel junction, thereby improving parameters like ON-current (ION), average subthreshold slope (SS avg) and ION/IOFF. The structure is modified further by employing a dual metal gate, having different work-functions, in addition to dual stacked oxide. The gate near the source, called as the tunneling gate, has a work function of 4.3 eV and a gate near the drain side, called as the auxiliary gate, has a work-function of 4.7 eV. This second proposed structure with dual metal gate and dual oxide offers significantly improved performance with on-current (ION) of ∼3 orders more than the conventional Double Gate (DG) Tunnel FET and a sub-threshold slope of 31 mV/dec. An ION of 2.7 × 10−5 A/ µm and an OFF current (IOFF) of ∼10−16 A/ µm is achieved in the second proposed device. The AC analysis has revealed that the cutoff frequency (fT) of the second proposed device is 1055 × higher than the conventional DG-TFET. Further, an increase of 3 orders of magnitude is achieved in the gain-bandwidth (GBW) product in the second proposed device in comparison to the conventional DG-TFET.

Switching performance assessment of gate-all-around InAs–Si vertical TFET with triple metal gate, a simulation study

This study presents a gate-all-around InAs–Si vertical tunnel field-effect transistor with a triple metal gate (VTG-TFET). We obtained improved switching characteristics for the proposed design because of the improved electrostatic control on the channel and the narrow bandgap source. It shows an Ion of 392 μA/μm, an Ioff of 8.8 × 10−17 A/μm, an Ion/Ioff ratio of about 4.4 × 1012, and a minimum subthreshold slope of 9.3 mV/dec at Vd = 1 V. We also analyze the influence of the gate oxide and metal work functions on the transistor characteristics. A numerical device simulator, calibrated to the experimental data of a vertical InAs–Si gate all around TFET, is used to accurately predict different features of the device. Our simulations demonstrate that the proposed vertical TFET, as a fast-switching and very low power device, is a promising transistor for digital applications.

Band-to-band tunneling switches based on two-dimensional van der Waals heterojunctions

Quantum mechanical band-to-band tunneling is a type of carrier injection mechanism that is responsible for the electronic transport in devices like tunnel field effect transistors (TFETs), which hold great promise in reducing the subthreshold swing below the Boltzmann limit. This allows scaling down the operating voltage and the off-state leakage current at the same time, and thus reducing the power consumption of metal oxide semiconductor transistors. Conventional group IV or compound semiconductor materials suffer from interface and bulk traps, which hinder the device performance because of the increased trap-induced parasitics. Alternatives like two-dimensional materials (2DMs) are beneficial for realizing such devices due to their ultra-thin body and atomically sharp interfaces with van der Waals interactions, which significantly reduce the trap density, compared to their bulk counterparts, and hold the promise to finally achieve the desired low-voltage operation. In this review, we summarize the recent progress on such devices, with a major focus on heterojunctions made of different 2DMs. We review different types of emerging device concepts, architectures, and the tunneling mechanisms involved by analytically studying various simulations and experimental devices. We present our detailed perspective on the current developments, major roadblocks, and key strategies for further improvements of the TFET technology based on 2D heterojunctions to match industry requirements. The main goal of this paper is to introduce the reader to the concept of tunneling especially in van der Waals devices and provide an overview of the recent progress and challenges in the field.

A Novel Comb-Gate-Overlap-Source Tunnel Field-Effect Transistor Based on the Electric Field Fringe Effect

In this article, a novel comb-gate-overlap-source TFET (CGOS-TFET) is designed and fabricated. The device combines surface tunneling with the electric field fringe effect to improve the tunneling probability. Compared with TFET devices fabricated with the same process parameters, the CGOS-TFET devices can improve the On-state current of the device by more than 31 times. Moreover the subthreshold swing of the device is reduced by more than 61%, and the turn-on voltage of the device is reduced by about half. The electric field fringe effect improves the surface tunneling probability of the tunneling region but also introduces nonideal effects, such as the hot carrier effect when the voltage is large. This article briefly analyzes the On-state current deterioration caused by the hot carrier effect and the ambipolar effect in the devices. The study is important to improve the characteristics of TFET devices, which have a good guiding role in accelerating the progress of device applications.

Analysis of Negative Differential Resistance and RF/Analog Performance on Drain Engineered Negative Capacitance Dual Stacked-Source Tunnel FET

In this article, we systematically investigate the impact of ferroelectric (FE) layer thickness ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${t}_{{\text {FE}}}$ </tex-math></inline-formula> ) on the electrical parameters of a negative capacitance dual stacked-source tunnel field-effect transistor (NCDSS-TFET) using TCAD simulator. The increase in <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${t}_{{\text {FE}}}$ </tex-math></inline-formula> leads to higher <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${I}_{ \mathrm{\scriptscriptstyle ON}}/{I}_{ \mathrm{\scriptscriptstyle OFF}}$ </tex-math></inline-formula> current ratio and better subthreshold swing (SS) with negligible hysteresis. However, increasing FE layer thickness also introduces negative differential resistance (NDR) which is undesirable for analog circuit applications. The NCDSS-TFET device is further optimized to eliminate NDR effects by engineering the drain. The analog/RF performance of the drain-engineered NCDSS-TFET such as transconductance ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${g}_{\text {m}}$ </tex-math></inline-formula> ), output conductance ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${g}_{\text {d}}$ </tex-math></inline-formula> ), intrinsic gain ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${g}_{\text {m}}/{g}_{\text {d}}$ </tex-math></inline-formula> ), cutoff frequency ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${f}_{\text {T}}$ </tex-math></inline-formula> ), and intrinsic delay ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\tau $ </tex-math></inline-formula> ) is investigated. Analysis reports that the analog/RF parameters are improved by increasing the drain underlap length, thus ensuring the drain-engineered NCDSS-TFET suitable for high-performance and ultralow power analog applications.

Enhancement of device characteristics of CNT-TFET: Role of electrostatic doping and work function engineering

In this work, an Electrostatic Doped Carbon Nanotube Tunneling FET (ED CNT-TFET) has been designed and simulated using a work function engineering technique. An intrinsic CNT is introduced as a channel material and a doped pocket is created between the source and the channel by utilizing an appropriate work function to boost the ON-state current of the device. Moreover, dielectric pocket engineering is applied to boost the high-frequency performance. The simulations, performed in this work, are conducted through a 2D solution of Poisson and Schrodinger equations which are done by utilizing the unbalanced Green function formalism. Simulation results demonstrate that the proposed device structure could improve the ON-current, cut-off frequency, and achieve a low subthreshold swing (SS) value which makes it suitable for low power applications. Additionally, the presented structure could also eliminate ambipolar conduction.

Application of a Charge Plasma Tunnel FET with SiGe Pocket as an Effective Hydrogen Gas Sensor

In this article, we have investigated the potential applications of a charge plasma TFET with a source pocket (SP-CPTFET) as a hydrogen gas sensor. The Si0.6Ge0.4 source pocket and HfO2 gate dielectric together greatly enhance the drain current. The presence of an intrinsic silicon body in the channel and drain controls the leakage current. Palladium (Pd) is considered the top and bottom gate catalyst for hydrogen (H2) gas sensing. The flat band voltage and CV properties of the sensor change as a result of the adsorption of H-atoms at the Pd-HfO2 and Pd surfaces. As a result, the gate work-function () modulates, affecting the drain current. The electrical analysis of the sensor is carried out in terms of transfer characteristics, band energy, current ratio, interband tunneling rate, and electric field. Additionally, the suggested sensor’s drain current sensitivity and current ratio sensitivity are estimated for various H2 pressure concentrations. The scope of the investigation has been expanded to include the effect of variation in the H2 gas pressure, germanium mole fraction, temperature, pocket length, interface trap charges (ITC), oxide thickness variation, and comparison of different catalytic metals on the drain current performance. The reported sensor exhibits a much-improved drain current sensitivity and current ratio sensitivity compared to the CPTFET gas sensor.

Electrical Performance Depending on the Grain Boundary-location in the Multiple Nanosheet Tunneling Field-effect Transistor based on the Poly-Si

In this study, we present the electrical characteristics of the multiple nanosheet tunneling field-effect transistors (MNSTFETs) based on the polycrystalline silicon (poly-Si) depending on the grain boundary (GB)-locations. The effects of the GB are analyzed for 5 locations and they are compared with the device without the GB. When the GB was located in the tunneling region, the electrical performances were the most inferior compared with the device without the GB. In addition, it shows the electrical characteristics of 125 samples of the MNSTFETs compared with the multiple nanosheet metal-oxide-semiconductor field-effect transistors (MNSMOSFETs). The standard deviations (SDs) of the threshold voltage (VT) of MNSTFET and MNSMOSFET are 3.90 mV and 8.31 mV, respectively. If the GB is not located at 24 nm, the SDs of the average of subthreshold swing (SSSUBave/SUB) are 1.50 mV/dec and 4.16 mV/dec, respectively. This simulation shows that the MNSTFET has smaller effect depending on the GB location than the MNSMOSFET.

A non-quasi-static model for nanowire gate-all-around tunneling field-effect transistors

Nanowires with gate-all-around (GAA) structures are widely considered as the most promising candidate for 3-nm technology with the best ability of suppressing the short channel effects, and tunneling field effect transistors (TFETs) based on GAA structures also present improved performance. In this paper, a non-quasi-static (NQS) device model is developed for nanowire GAA TFETs. The model can predict the transient current and capacitance varying with operation frequency, which is beyond the ability of the quasi-static (QS) model published before. Excellent agreements between the model results and numerical simulations are obtained. Moreover, the NQS model is derived from the published QS model including the current–voltage (I–V) and capacitance–voltage (C–V) characteristics. Therefore, the NQS model is compatible with the QS model for giving comprehensive understanding of GAA TFETs and would be helpful for further study of TFET circuits based on nanowire GAA structure.

Double-Heterostructure Resonant Tunneling Transistors of Surface-Functionalized Sb and Bi Monolayer Nanoribbons

Zigzag nanoribbons tailored from chemically surface-modified Sb or Bi monolayers by methyl, amino or hydroxyl are investigated through first-principles electronic-structure calculations to explore their potential applications in topological transport nanoelectronics. It is verified by Dirac-point-like energy dispersion of band-edges near Fermi level that the scattering-forbidden edge-states of these nanoribbons can give a topological conductive channel with extremely high electron mobility. Accordingly, Sb/SbXHn/Sb and Bi/BiXHn/Bi nanoribbon double-heterostructures (SbXHn or BiXHn: XHn = CH3, NH2, OH) are designed as resonant tunneling transistors and modeled by bipolar transport devices with their electron transport characteristics being calculated by nonequilibrium Green’s function combined first-principles schemes. Ballistic equilibrium conduction spectra and current-voltage characteristics prove that quantum conductance currents of these nanoribbon double heterostructures originate from the electron resonant tunneling between the topological edge-states of the two constituent Sb or Bi monolayer nanoribbons through the central barrier of SbXHn or BiXHn nanoribbon segment. This renders a high resonant current peak with strong negative differential conductance, thus being competent for zero-loss and ultrahigh-frequency resonant tunneling nanotransistors.