TFET Research Articles

III–V heterostructure tunnel field-effect transistor operation at different temperature regimes

Tunnel field-effect transistors (TFETs) are a potential alternative to MOSFETs for low-temperature electronics. We provide an in-depth experimental characterization of TFETs analyzing the fundamental physical behavior at different temperature regimes. TFET characteristics from 13 to 300 K both in forward and reverse bias are discussed by employing a variation in InAs/InGaAsSb/GaSb heterojunction vertical nanowire devices. Evaluation of the TFET Negative Differential Resistance (NDR) characteristics at different temperatures is established as a technique to probe the dopant incorporation. It is observed that the temperature dependence of the Fermi degeneracy and Fermi-Dirac distribution largely influences the transistor performance at each operating temperature. Our investigation reveals that the TFETs demonstrate lower subthreshold swing than the physical limit of MOSFETs above 125 K. For low-temperature applications, the devices can be operated down to a low operating bias of 0.1 V, while for high temperature, a larger bias of 0.3 V is preferred.

Ultra-sensitive dengue NS1 protein detection via asymmetric source-drain, heterojunction and dual-dielectric cavities in a uniform tunnel FET biosensor

In this paper, we present a unique Asymmetric Source-Drain Heterojunction Dual-Dielectric Uniform Tunnel Field Effect Transistor (A-SD-HJ-DD-UTFET) based biosensor tailored for the early detection of dengue NS1 protein during the acute phase of infection offering early diagnosis and potentially life-saving intervention. The proposed biosensor design features simplified fabrication, a narrow drain region, and a dual material control gate, enhancing specificity and sensitivity for dengue virus detection. Using a heterojunction configuration, this device optimizes electron flow for improved detection accuracy. The roles of Tunnel Gate (TG) and Auxiliary Gate (AG) are studied in terms of band energy, electric field, electrostatic potential, and other sensitivity parameters. Sentaurus TCAD tool is utilized for analyzing the characteristics of the proposed A-SD-HJ-DD-UTFET biosensor. Simulation results indicate that the designed A-SD-HJ-DD-UTFET biosensor achieves a superior Subthreshold Swing (SS) of 15.4 mV/dec and an enhanced ION/IOFF sensitivity of about 2.25 × 10¹¹ with a maximum ON and minimum OFF state currents of 2.28 × 10–4 A/μm and 1.28 × 10–16 A/μm respectively for detecting NS1 protein of dengue. Additionally, it boasts a high switch ratio in the order of 1012. The proposed biosensor outperforms conventional devices, including the state-of-the-art Junctionless (JL)-TFET biosensors. The superior electrical characteristics of the proposed A-SD-HJ-DD-UTFET biosensor make it a promising device for early detection of the dengue NS1 protein, providing a potent solution for mitigating the spread of dengue infections.

Study and analysis of a dielectric-modulated vertical tunnel FET biosensor using dual material gate

A bimetal gate heterogeneous dielectric vertical tunnel field-effect transistor (BG-HD-VTFET) biosensor has been investigated in this paper for the first time using engineered-gate concept, where nanogaps are introduced under tunnel gate (TG) to detect biomolecules near the device surface. To improve the detection performance of BG-HD-VTFET, an overlap is designed between source and pocket region, and the sensing ability of BG-HD-VTFET with and without overlap is compared in details. Further, an auxiliary gate (AG) is added for the proposed two devices to optimize the electrical characteristics, and the y composition of GaAsySb1-y in pocket region is optimized to enhance ON-state current, and then different neutral and charged biomolecules are considered to simulate device-level gate effects. In addition, the influence of different dielectric constant at fixed charge density is studied and the length of overlap is optimized. Simulation results show that the maximum sensitivity of BG-HD-VTFET with and without overlap can reach 3.3 × 103 and 1.9 × 103, respectively.

Analytical modeling of III-V heterojunction source-all-around vertical tunnel FET and its inverter circuit application

Abstract This paper presents a comprehensive analytical modeling framework for the III-V heterojunction source-all-around vertical tunnel field-effect transistor (SAA V-TFET). Using Kane's model, our approach involves solving Poisson's equations to obtain a continuous surface potential profile, followed by the derivation of drain current. These models demonstrate excellent accuracy across all operating regions, precisely predicting the potential profile, output, and transfer characteristics of SAA V-TFETs. We implemented the models in MATLAB and validated them against Sentaurus TCAD simulations. Furthermore, we present a comprehensive performance analysis of SAA V-TFET-based digital inverters.

Design and performance investigation of tunnel-FET based energy efficient approximate and accurate adders targeted towards low power IoT nodes

Abstract The proliferation of IoT enabled SoCs in state-of-the-art consumer electronics has necessitated the use of beyond CMOS devices for the energy efficient computations and sensing design space. In the low supply voltage (VDD) regime, Tunnel FETs (TFETs) have shown serious potential at VDD less than 0.5 V. However, the inherent structure, characteristic interband tunneling and enhance Miller capacitance in TFETs do not allow the conventional CMOS logic design styles to be universally used for TFET based logic circuits. In this paper, we propose three energy efficient and novel TFET based accurate adder circuits namely, Static Energy Recovery Full adder (SERF), Complementary and Level Restoring Carry Logic Full adder (CLRCL) and Balanced Restoring Carry Logic full adder (BRCL) based on constituent TFET based functional units which do not use the CMOS design style. Further, novel approximate adders have been developed for energy efficient implementation in IoT nodes. The BRCL adder consumes approximately 60% less area and 85.36% and 89.6% less energy in comparison to SERF and CLRCL respectively. The approximate adders in the best and worst case facilitate approximately 92% and 75% savings in area and consumes 71% less power than the BRCL adder. When compared to the standard UMC 45 nm bulk MOSFET based designs, the TFET based accurate adders operate at 25% less energy while the approximate adders consume 40% less. All the circuit simulations have been performed using Spectre Simulator of Cadence and device characterization using 2D-TCAD tool.

Study of A Heterojunction Double Gate Ferroelectric p-n-i-n Tunnel FET combining analytical modeling and TCAD simulation

A short channel Heterojunction Double Gate Ferroelectric p-n-i-n Tunnel Field Effect Transistor structure is proposed in this article to alleviate undesirable ambipolarity and Miller Capacitance and has a steeper subthreshold swing with improvement in ON state current compared to other conventional TFET structures. This work develops a physics based relevant analytical model of surface potential with the effect of gate fringing field and inclusive source and channel depletion region, drain current model, terminal charge and capacitance model to investigate its transient performance for the impact of ferroelectric polarization according to the Miller Ferroelectric polarization model. The proposed device is also validated using the SILVACO ATLAS device simulator, which yields a good agreement with the model, establishing its reliability and acceptability. The device achieves a steeper subthreshold of 31.3 mV/decade, an improved ON current∼5.9 x 10−4A/μmand enhanced transconductance∼0.105 ms as well as a very low energy delay product (EDP)∼4.07 x 10−3Js with hysteresis free operation at a low supply voltage∼0.5 V in a 40 nm technology node, making it desirable for ultra-low power analog and logic applications.

Evaluation of sensitivity in a vertically misaligned double-gate electrolyte-insulator-semiconductor extended source tunnel FET as pH sensor

In this research, the primary objective is to investigate the impact of vertical gate misalignment on the source and drain regions of 30 nm. The double-gate Electrolyte-Insulated-Semiconductor extended-source Tunnel Field-Effect Transistor (ES-VTFET) is proposed for its potential application as a pH sensor. The gate electrode cannot be perfectly aligned with the channel due to fabrication tolerances, particularly in very short-channel structures. This study aims to introduce a vertical electrolyte Bio-TFET-based pH sensor capable of detecting pH changes in aqueous (electrolyte) solutions. The effect of variation in pH values on the electrical characteristics of the device such as drain current (IDS), transconductance (gm), voltage sensitivity (SV) and current sensitivity (SI) have been examined. It has been assumed that the electrolyte section is an intrinsic semiconductor material where electrons and holes signify mobile ions in aqueous solutions. The electrolyte region has an electrolyte dielectric constant of 78, an energy bandgap of 1.12 eV, and an electron affinity of 1.32 eV. Finally, the gate misalignment aspect of the proposed bio TFET-based pH sensor is emphasized by comparing sensitivity parameters. Hence, the proposed pH sensor can be used as a potential candidate for the futuristic application of biosensors.

Analysis on density of states and ION/IOFF ratio of GaN/GaN-graphene nanoribbon tunnel FET for enhanced bio-sensing applications

Abstract This research introduces a new analytical model that studies the effect of ferro-dielectric on the operational performance of TFETs doped with halogens. The effect of source and drain depletions, voltage-drain & gate, thickness and capacitance of gate insulator are all investigated in this study. Accurate measurements of the surface potential are required to ascertain the transconductance, gate-to-drain capacitance, and lateral electric field of the device. Our model, which employs Ferroelectric Halo-Doped double gate (FHDD)-gated device designs, has been demonstrated to produce results that nearly match those produced from TCAD simulations. This was accomplished by doing a comparative analysis of the outcomes derived from both sets of simulations. Furthermore, the performance of the suggested structure of TFET, which integrates a dielectric of Fe and GaN heterostructure, surpasses that of other similar devices (fT) in terms of ON current, ON/OFF ratio, transconductance, and cut-off frequency. A ferroelectric dielectric was used to create a ferroelectric heterostructure. This study also centers on the creation and application of a graphene nanoribbon field effect transistor (GNR-TFET) to detect sugar molecules, specifically fructose, xylose, and glucose. The detecting signal is generated by utilizing the fluctuation in the electrical current of the GNR-TFET caused by the presence of individual sugar molecules. The GNR-TFET exhibits noticeable variations in the density of states, transmission spectrum, and current when exposed to individual sugar molecules. The sensor under investigation is being developed and examined using a combination of semi-empirical modeling and non-equilibrium Green's functional theory (SE + NEGF). According to the research, the modified GNR TFET has the ability to quickly and accurately detect individual sugar molecules in real-time.

Sensitivity analysis of an inverted T-shaped vertical tunneling field effect transistor biosensor based on inserted finger type

This paper presents a biosensor based on a finger-inserted inverted T-shaped vertical tunneling field effect transistor (FP-T-TFET). In order to improve the sensitivity and performance of the biosensor, a finger-inserted contact between the source and the channel is used. A comparative analysis between the biosensor based on FP-T-TFET and conventional inverted T-shaped TFET (T-TFET) is simulated for the electrical properties and sensitivity of neutral biomolecules with different dielectric constants and charged biomolecules with different charge densities. The noise analysis of the proposed structure is also performed. Then, the effects of insertion finger distribution, cavity size and filling volume on the performance of FP-T-TFET are investigated. Finally, the structure was subjected to linear analysis, in which the pearson coefficient was 0.92, indicating that the structure has good linear correlation. The results show that the FP-T-TFET biosensor has higher sensitivity in detecting various neutral and charged biomolecules. All device simulations were performed in the TCAD environment with a well-calibrated structure.

Analysis of etched drain based Cylindrical agate‐all‐around tunnel field effect transistor based static random access memory cell design

AbstractThis paper aims to propose a novel method for designing an static random access memory (SRAM) cell using an etched drain based Cyl GAA TFET with a hetero‐substrate material and an elevated density strip. The aim is to reduce power dissipation and improve stability, as demonstrated through analysis utilizing static noise margin (SNM) as well as N‐curve methods. With respect to the 16 nm MOSFET based SRAM cell, the proposed device‐based SRAM cell shows significant improvements with a 68.305% reduction in leakage power, a 15.58% increase in static voltage noise margin (SVNM), an 8.623% increase in static current noise margin (SINM), an 8.152% increase in write trip voltage (WTV), a 12.86% increase in write trip current (WTI), a 27.62% increase in static power noise margin (SPNM), and a 19.95% increase in write trip power (WTP). The design is implemented and analyzed using Cadence Virtuoso software, and a novel approach of look up tables and Verilog A is utilized for the device to circuit application. These results indicate promising advancements in the design of SRAM cells, which could have significant implications for the development of advanced computer systems.

Modelling of Cut-off Frequency of Armchair Graphene Nanoribbon Tunnel Field Effect Transistor Using Transfer Matrix Method

Graphene is considered as a promising two-dimensional material for electronic device applications due to its high charge carrier mobility and it is extremely thin in size. As a material, graphene has great potential for the development of high-speed nano electric devices. Graphene can be used as a channel material in Tunnel Field Effect Transistor (TFET). In this study, the cut-off frequency of the armchair graphene nanoribbon tunnel field effect transistor (AGNR-TFET) device was modelled quantum mechanically. The solution of the Dirac-like Hamiltonian and Poisson equations self-consistently is used to determine the potential profile of device and the transmittance is calculated using the transfer matrix method (TMM). The Landauer formulation with the help of Gauss Legendre Quadrature Method (GLQM) is used to calculate the tunnelling current and the cut-off frequency of AGNR-TFET. The calculation results showed that the cut-off frequency increased as the drain voltage increased, while the increase in channel length and the N-index graphene made the cut-off frequency decreased. Moreover, the thicker the oxide layer could increase the cut-off frequency and the higher the temperature on the device would reduce the cut-off frequency.

Dielectric Modulated Nanotube Tunnel Field-Effect Transistor with Core-Shell Cavity as a Label-Free Biosensor: Proposal and Analysis.

Dielectric Modulated Field-Effect Transistors (DMFETs) have emerged as promising candidates for label-free bioanalyte detection. However, the inherent short-channel effects in conventional DMFETs increase their static power dissipation significantly and limit their scalability and sensitivity. Therefore, FETs based on alternate conduction mechanism such as tunneling (TFETs), which are immune to the short-channel effects, appear to be a lucrative alternative to the MOSFETs for biosensing application. In this work, we propose a novel Dual Cavity Dielectric Modulated Nanotube Tunnel FET (DCDM NTTFET)-based label-free biosensor consisting of a Ge source and nanocavities within the core as well as a shell gate stack, which not only outperforms the conventional MOSFET and advanced nanowire (NW) TFET-based biosensors in terms of energy-efficiency and scalability but also exhibits a significantly high drain current sensitivity (SION = 2.9 × 108) and a threshold voltage sensitivity (SVth = 0.85), and a considerably high selectivity of more than 6 orders of magnitude. We also perform a comprehensive design space exploration for the proposed DCDM NTTFET and provide necessary design guidelines to further improve its performance considering the practical artifacts such as steric hindrance.

Transport in a Two-Channel Nanotransistor Device with Lateral Resonant Tunneling.

We study field effect nanotransistor devices in the Si/SiO2 material system which are based on lateral resonant tunneling between two parallel conduction channels. After introducing a simple piecewise linear potential model, we calculate the quantum transport properties in the R-matrix approach. In the transfer characteristics, we find a narrow resonant tunneling peak around zero control voltage. Such a narrow resonant tunneling peak allows one to switch the drain current with small control voltages, thus opening the way to low-energy applications. In contrast to similar double electron layer tunneling transistors that have been studied previously in III-V material systems with much larger channel lengths, the resonant tunneling peak in the drain current is found to persist at room temperature. We employ the R-matrix method in an effective approximation for planar systems and compare the analytical results with full numerical calculations. This provides a basic understanding of the inner processes pertaining to lateral tunneling transport.

Exploring the Potential of Tunnel Field-Effect Transistors in Biomedical Devices: A Comprehensive Survey

Implantable medical devices have revolutionized healthcare by providing continuous monitoring and therapeutic interventions within the human body. The overall performance of these devices is heavily dependent on the effectiveness and efficiency of integrated electronic components, such as transistors. This survey explores the growing utilization of Tunnel Field-Effect Transistors (TFETs) in implantable devices, shedding light on their advantages and challenges in this specific application domain. TFETs, characterized by their unique tunnelling mechanism, offer several advantages that make them well suited for implantable devices. Their low-power consumption, reduced leakage current, and improved subthreshold swing make them ideal for energy-efficient, long-lasting operation within the constrained power budgets of implantable devices. Furthermore, TFETs exhibit excellent performance at low supply voltages, ensuring minimal tissue damage and heat generation. This survey also addresses the challenges associated with TFETs in implantable devices, including fabrication complexities, variability, and compatibility with existing technologies. It highlights recent advancements in TFET technology that address these concerns, such as improved material choices and manufacturing techniques. As technology continues to advance, TFETs are poised to play a pivotal role in improving the overall efficiency and reliability of life-saving technologies and medical devices. Overall, this survey provides valuable insights into the current state and future prospects of TFETs in implantable devices, guiding researchers and engineers in harnessing their potential for the benefit of healthcare and patient well-being.

Multifunctional Reconfigurable Operations in an Ultra-Scaled Ferroelectric Negative Transconductance Transistor.

The integration of functional materials into electronic devices has become a key approach to extending Moore's law by increasing the functional density of electronic circuits. Here, we present a device technology based on ultrascaled ferroelectric, antiambipolar transistors (ferro-AAT) with robust negative transconductance, enabling a wide range of reconfigurable functionalities with applications in both the digital and analog domains. The device relies on the integration of a hafnia-based ferroelectric gate stack on a vertical nanowire tunnel field-effect transistor. Through intentional gate/source overlap and tunnel-junction engineering, we demonstrate enhanced antiambipolarity with a high negative transconductance that is reconfigurable using the nonvolatile remanent polarization of the ferroelectric. Experimental validation highlights the versatility of this ferro-AAT in two implementation scenarios: content addressable memory (CAM) for high-density data search and reconfigurable signal processing in analog circuits. As a single-transistor cell for CAMs, the ferro-AAT shows subpicojoule operation for one search with a compact footprint of ∼0.01 μm2. For single-transistor-based signal modulation, multistate reconfigurations and high power conversion (>95%) are achieved in the ferro-AAT, resulting in a significant reduction in the complexity of analog circuit design. Our results reveal that the distinctive device properties allow ferro-AATs to operate beyond conventional transistors with multiple reconfigurable functionalities, ultrascaled footprint, and low power consumption.

Novel hybrid TFET-FinFET 12T SRAM cells with enhanced write margin and read performance

This work presents two innovative 12T cells combining tunnel field-effect transistor (TFET) and fin field-effect transistor (FinFET) technologies. These cells address reverse bias current issues by incorporating separate paths for reading data and write enhancement cut transistors, enhancing hold/read/write static noise margin (H/R/WSNM), reducing read time, and minimizing power consumption from TFET leakage. At 0.6 V, the first (second) SRAM cell shows a WSNM improvement over O_7T, 8T, CA_10T, 12T, and HF_10T cells by 152 % (93 %), 152 % (93 %), 157.7 % (97.5 %), 95 % (50 %), and 104 % (57 %), respectively. The leakage power of the first (second) 12T TFET SRAM cell is two (four) orders of magnitude lower than O_7T and 8T SRAM cells. These hybrid SRAM cells also exhibit faster read operations across VDD voltage levels (0.3 V–1 V) and the first 12T cell demonstrates shorter write access times than 12T and CA_10T SRAM cells. These characteristics make the proposed cells particularly suitable for energy-efficient IoT devices and medical applications, where balancing power, area, performance, and data integrity is critical.

Performance assessment of SiGe extended four corner source TFET for biosensing applications

In this paper, the performance of a novel SiGe extended four corner source tunneling field–effect transistor (SiGe EFCS TFET) based dielectrically modulated label-free biosensor has been investigated for biosensing applications. Using a combination of heterostructure (SiGe/Si) and extended four corner source (EFCS) lead to increased band–to–band tunneling (BTBT) probability, improved gate control and superior drain current sensitivity for biomolecule conjugation in comparison with a conventional TFET and Si EFCS TFET structures of similar dimensions. The influence of both the charge–neutral and charged biomolecules on the sensitivity performance is investigated using the Silvaco TCAD ATLAS semiconductor device simulator with a calibrated nonlocal BTBT model. Four different kinds of biomolecules such as Streptavidin, Ferro–cytochrome c, Keratin and Gelatin with various charge density values were used for this purpose. In order to model steric hindrance effects in partially filled cavities, in addition to various fill factors, four different step profile patterns have considered such as convex, concave, decreasing and increasing step profiles. Also, the dependence of the nanogap cavity properties on the sensing performance in terms of the length and thickness is investigated. A maximum drain current sensitivity of 1.69 × 105 is achieved in SiGe EFCS TFET for Gelatin biomolecules in a fully filled nanogap cavity at overdrive and drain voltages of 0.5 V.

Design Points of InGaAs MFMIS Tunnel FET for Large Memory Window and Stable Ferroelectric Memory Operation

Design Points of InGaAs MFMIS Tunnel FET for Large Memory Window and Stable Ferroelectric Memory Operation

Impact of SiGe pocket on different shape TFET structures for gas sensing application

Gas sensing requires highly sensitive and selective sensor technologies for environmental monitoring, industrial safety, and public health objectives. Although conventional MOSFET-based gas sensors are widely utilized, their detection of low quantities of gases, such as ammonia, is hindered by a number of severe constraints. TFET is emerged as the better device than MOSFET, particularly for the sensing applications. In this work we discussed the source engineered and shape engineered techniques to improve the performance of TFETs, specifically for ammonia gas detection. Comprehensive simulations on SILVACO TCAD and compared the four TFET structures SiGe-pocket DGTFET, SiGe-pocket vertical TFET SiGe-pocket Z-shape TFET, and SiGe-pocket U-shape TFET structure on the basis of various electrical characterization parameters. Significant improvements in efficiency and sensitivity are obtained by adjusting the work function of the molybdenum (4.40–4.60 eV) catalytic gate metal to find the optimal values. The findings reveal that the SiGe-pocket U-shape TFET structure exhibits superior performance, demonstrating an ION of 8.01 × 10−4 A/μm, an ION/IOFF ratio of 1.25×1013, and an OFF current sensitivity (SOFF) of 1.262. These results highlight the enhanced sensitivity and efficacy of the proposed SiGe-pocket U-shape tunnel FET in ammonia gas sensing applications, making it a promising candidate for practical uses in environmental monitoring and industrial safety.

Low-power ternary inverter using vertical tunnel field-effect transistor with pocket

ABSTRACT This paper proposes a vertical tunnel FET with pocket (VP-TFET)-based standard ternary inverter (T-inverter) model for low-power applications. Using TCAD Sentaurus tool and mixed-mode simulations, it is verified that the device can exhibit T-inverter voltage transfer characteristics (VTCs) with three steady output voltage levels when the doping length and concentration of the pocket are optimized The device’s T-inverter characteristics are achieved by employing channel-channel and source-channel tunnelling mechanisms. Current matching is crucial for n-/p–type devices to produce a steady third output voltage state. The proposed ternary inverter’s static noise margin (SNM) and static and dynamic power dissipations are computed to be 220 mV, 4.8 × 10−12 W, and 4 × 10−12 W, respectively, which assures better noise immunity and low power consumption compared to other models.