TFET Research Articles

Performance Optimization of Vertical Tunnel Field-Effect Transistors: Impact of Gate and Dielectric Length Variations

Performance Optimization of Vertical Tunnel Field-Effect Transistors: Impact of Gate and Dielectric Length Variations

Quantum simulation of spin tunneling field-effect transistor based on antimonene

Quantum simulation of spin tunneling field-effect transistor based on antimonene

Performance Optimization of High-κ Engineered TM-DG-InP/GaAs-TFET for Ultra-Sensitive Biosensing Applications: Mechanistic Insights and TCAD Simulation Analysis

Abstract This study presents a computational model for an advanced dopamine biosensing platform based on a halo-doped dual-gate tunnel field-effect transistor (DGTFET) incorporating high-k dielectrics and a silicon carbide (SiC) substrate. The proposed model utilizes a heterostructure composed of indium phosphide (InP) and gallium arsenide (GaAs), optimized for high-sensitivity biomolecule detection. The computational framework is developed by solving the two-dimensional Poisson equation within a scaled graphene channel region, ensuring boundary conditions that enhance sensing performance. Key structural enhancements, including halo doping and the integration of high-k dielectric materials such as titanium dioxide (TiO₂), are implemented to improve the device’s electrical behaviour. The proposed DGTFET exhibits significant performance improvements, including optimized electric field distribution, reduced drain-induced barrier lowering, controlled threshold voltage roll-off, and enhanced channel potential. The device achieves an exceptionally high ION/IOFF ratio of 10¹⁰, with an off-state current minimized to approximately 10⁻¹⁵ A/µm and an on-state current increased to around 10⁻⁵ A/µm. These advancements make the halo-doped DGTFET highly suitable for ultra-sensitive dopamine detection. Moreover, the optimized subthreshold characteristics further enhance its capability for detecting low-concentration biomolecules. The analytical findings are corroborated through Silvaco TCAD simulations, validating the model’s accuracy and effectiveness in real-world biosensing applications.

Performance Optimization of Germanium-Graphene Heterojunction Tunnel Field Effect Transistor using Dual Metal Strip

This work presents and investigates a Dual Metal Gate Graphene Nanoribbon (DMHGNR) with a Germanium heterojunction-based Tunnel Field-Effect Transistor (DMHGNRTFET). The impact of a dual metal strip combined with a hetero-dielectric on the heterojunction TFET architecture is analyzed. Optimization of the ON/OFF current and their ratio is achieved by the use of design engineering, bandgap engineering, and work function engineering. Simulations are carried out to evaluate the proposed DMHGNRTFET together with GNRGeTFET and GNRSiTFET by examining surface potential, energy band diagrams, carrier concentration, electric field distribution, Id-Vgs characteristics, and transconductance. The DMHGNRTFET exhibits an Ion/Ioff ratio of approximately ̴10¹², alongside a minimal subthreshold swing (SS) of 33.9 mV/decade. It features the lowest threshold voltage observed at 0.41 V and achieves a maximum Ion of 2.44 × 10⁻4 A/μm. The findings of SILVACO TCAD simulations suggest the potential for enhanced performance in low power applications of the DMHGNRTFET.

Investigation on the variation effect of gate work function on $$N^+$$ pocket-doped junctionless vertical tunneling FETs

Investigation on the variation effect of gate work function on $$N^+$$ pocket-doped junctionless vertical tunneling FETs

Comparative study of different types of embedded TFETs for extremely low power mixed signal applications

Abstract In the semiconductor industry there is constant demand to improve critical performance parameter of transistor including lowering of power requirement. Tunnel FET has emerged as one of the most favourable candidate for the next generation transistor for extremely low power requirements in mixed signal circuits. These tunnels FET have an edge in terms of power requirements but major challenges still persist including low ON current, high OFF current, low ION/IOFF ratio and high Ambipolar current for digital applications. In this paper, the investigation and exploration is on our unique embedded gate where gate is embedded into the channel from top and bottom, resulting in three different types of Embedded Double Gate TFET (EDG-TFET) structures for the very first time for extremly low-power applications. We introduced and studied for the first time EDG-TFET structure with Dual Material in the first type (DM), Dual dielectric in the second type (DD), and drain dielectric pocket in the third type (DP) in EDGTFET. It was possible to obtain promising result in terms of ON current with DMEDG-TFET structure with maximum ON current value of 1.1 × 10−3 A μm−1. It was also possible to obtain promising result in terms of OFF current in all the above mention configuration where OFF current reaches minimum value of 10−19 A μm−1. This study has helped to achieve an improvement in Ambipolarity behaviour in EDGTFET configuration where DP structure shows minimum ambipolar current of value 1.1 × 10−20 A μm−1. All the above DC parameter may be good for digital logic application. While EDGTFET having DM structure shows most promising results for RF/Analog applications. Lastly, we compared a unique embeded double gate with other non-embedded TFET structures for analog and digital applications.

Extraordinary photoresponse in sub-5 nm 2D GaN tunneling field effect transistor for optical detection application

Extraordinary photoresponse in sub-5 nm 2D GaN tunneling field effect transistor for optical detection application

Design and analysis of trigate Ge pocket vertical tunnel FET for enhanced drive current

Design and analysis of trigate Ge pocket vertical tunnel FET for enhanced drive current

Geometry engineering of tunneling transistors in transition metal dichalcogenide nanoribbon heterojunctions

Graphene nanoribbon heterojunctions are promising one-dimensional materials for quantum electronics due to their tunable bandgap and sizable quantum confinement. However, their band alignment is significantly influenced by dimensional fluctuations, impeding the development of stable and reliable devices. Here, we engineer geometry edges of transition metal dichalcogenide (TMD) nanoribbons to design versatile nanoribbon heterojunctions by combining metallic zigzag and semiconducting armchair edges. T- and H-shaped nanoribbons exhibit robust edge-state transport for tunneling and resonant tunneling, respectively. The quantized subbands confined within H-shaped nanoribbon are modulated by zigzag edges. In contrast, T-shaped configuration shows different tunneling for electrons and holes, which are tunable via armchair edges. Moreover, the device characteristics suggest that tunneling transistors display moderate current dependence on the barrier width, while resonant tunneling transistors exhibit negative differential resistance with peak-valley ratio improved by lengthening armchair edge. This study proposes using geometry edge as a degree of freedom to engineer two-dimensional material nanoribbon heterojunctions, with broad potential for quantum electronic and optoelectronic applications.

Investigation of Single Event Upset and Its Mitigation in Hetero Junctionless Tunnel FET SRAM Cell

Investigation of Single Event Upset and Its Mitigation in Hetero Junctionless Tunnel FET SRAM Cell

Co-optimization of nanotube tunnel FET performance for implementation in low-power complementary ternary inverter

Co-optimization of nanotube tunnel FET performance for implementation in low-power complementary ternary inverter

Performance Analysis of the Ultrathin-Body L-Shaped Tunnel FET for Hydrogen Gas Detection—A Device Simulation-Based Approach

Performance Analysis of the Ultrathin-Body L-Shaped Tunnel FET for Hydrogen Gas Detection—A Device Simulation-Based Approach

Energy-efficient neuromorphic system using novel tunnel FET based LIF neuron design for adaptable threshold logic and image analysis applications

In this study, a novel tunable dopingless band-to-band tunneling mechanism based Leaky Integrate and Fire (LIF) neuron is proposed with a notable improvement in integration density and energy consumption. The forward transfer characteristics of Tunnel FET with sharp sub-threshold swing have been utilised to simulate the neural activity. The simulations performed using Atlas 2D software confirm that the proposed TFET can effectively replicate the spiking behavior of a biological neuron, eliminating the need for additional circuitry, in addition to offering tunable features. The proposed LIF neuron demonstrates significantly lower energy consumption, operating at just 144 aJ per spike. This energy efficiency is at least times lower than the single MOSFET-based neuron and times lower than TFET-based 1-transistor neurons reported in prior literature. This remarkable improvement is attributed to the underlying mechanism, which leverages tunneling and material engineering techniques. The proposed neuron has also been successfully investigated for the implementation of adaptable threshold logic functions (NOT, OR and AND). This offers a solution for the design of highly scalable and energy efficient threshold logic circuits for future neuromorphic computing systems. Lastly, we implement a multilayer SNN that confirms the image recognition ability of the proposed neuron with 92.1 accuracy.

Modeling and Simulation of High-Sensitivity Silicon-Graphene TFET for Label-Free Biosensors

Abstract This paper proposes a Silicon-Graphene heterojunction barrier gate structure tunneling field effect transistor (SG-BG TFET) to solve the issue of low sensitivity in bio-detection. The sensor employs the dielectric modulation effect to achieve highly sensitive, label-free detection of biomolecules. The biomolecules are confined in the cavity under the barrier gate and distinguished by differing dielectric constants and charges. The sensor was modeled and simulated using the Silvaco TCAD software. The results show that the SG-BG TFET sensor effectively overcomes the bipolar problem in traditional graphene tunneling structures. The sensor displays a larger switching current ratio (1.24×1013), a smaller subthreshold swing (4.8 mV/dec), and a maximum current sensitivity of 8.85×1012 and a tunneling voltage sensitivity of 1.02 V for the detection of neutral biomolecules with k = 12. Furthermore, this paper further analyzes the impact of doping concentration in the barrier region on the sensor's sensitivity. Compared with other biosensors, the SG-BG TFET sensor has higher sensitivity and lower power consumption.

Quantum Sensitive, Record Dynamic Range Terahertz Tunnel Field-Effect Transistor Detectors Exploiting Multilayer Graphene/hBN/Bilayer Graphene/hBN Heterostructures.

Sensitive photodetectors showing large quantum efficiencies and broad dynamic ranges are essential components for on-chip integrated photonic quantum platforms and for probing quantum correlations in metrological sources. However, at terahertz (THz) frequencies, this is a very challenging task owing to the lack of high-absorption materials and thermal effects that impact their noise figure. Here, we develop antenna-coupled tunnel field-effect transistors, based on multilayer graphene/hBN/bilayer graphene/hBN that detect multiwavelength beams at frequencies ∼3 THz with record performances. We reach noise-equivalent powers of ∼10-12 WHz-1/2, a power dynamic range exceeding 5 orders of magnitude, limited by the maximum output power (0.8 mW) of the employed source, and a minimum detectable power at the nW-level, in a frequency-scalable device architecture. Our results open intriguing perspectives for the statistical analysis of quantum intensity correlations in nonclassical light sources operating in the underexploited THz frequency gap, between technologically mature domains (microwave, visible, near-infrared) that currently dominate the field of quantum technologies.

Machine learning and explainable-AI based prediction of gate-all-around ferroelectric-FET: how ML models influence XAI

Abstract A novel integration of machine learning (ML) and eXplainable artificial intelligence (XAI) based prediction is proposed to investigate the variability of nanowire (NW) gate-all-around (GAA) ferroelectric-field effect transistors (Fe-FETs). XAI methods such as local interpretable model-agnostic explanations (LIME) and shapley additive explanations (SHAP) enhance the explainability and robustness of ML algorithms for end-users. The NW-GAA-ferro-FETs show tremendous potential for neuromorphic computing systems and compatibility with complementary-metal-oxide-semiconductor technology. The GAA-ferro-FET model is validated using sentaurus technology computer-aided design simulations and experimental data. In this work, the first-ever ML algorithms for NW-GAA-ferro-FETs are proposed, achieving physics-based TCAD accuracy with faster learning and lower computational cost. Compared to ML-based algorithms, physics-based simulation of conventional emerging devices requires a high level of device information and a substantial amount of time to provide correct findings and well-fit models. The ML algorithm achieved a R2-score of 99.96%, a lower mean square error, and completed the average inference in just 71.82 milliseconds, compared to TCAD simulations that would take 400 h (=17 days) to process 5000 samples. The results indicate that the novel integration of ML and XAI can lead to a substantial reduction in the computational cost associated with various emerging FET devices, such as ferro-FET, feedback FET, tunnel FET, 2D material-based FET, spin-FET, bio-FET, and other next-generation FETs. End-users can receive suggestions and warnings about potential errors before initiating the investigation process, this helps speed up the development of ferro-FET and other next-generation FETs for use in aerospace, defence, and space exploration.

Design of a gate-all-around arch-shaped tunnel-field-effect-transistor-based capacitorless DRAM

In this study, we designed and analyzed a single-transistor dynamic random-access memory (1 T-DRAM) based on an arch-shaped gate-all-around tunnel field-effect transistor (GAA ARCH-TFET), featuring an Si/SiGe heterostructure, for high-density memory applications. Unlike conventional 1 T-DRAM, which relies on the electric-field-driven movement of charge carriers through a channel for the read operation, the GAA ARCH-TFET 1 T-DRAM utilizes band-to-band tunneling. The GAA structure improves scalability, making it suitable for high-density memory applications. This capacitorless GAA ARCH-TFET 1 T-DRAM cell demonstrates both superior performance and low energy consumption. The arch-shaped design expands the tunneling area, while the Si/SiGe heterostructure forms a quantum well that further enhances memory performance. The effects of key parameters, including source height, channel height, and germanium composition, on device behavior are examined. Simulation results reveal that the GAA ARCH-TFET 1 T-DRAM achieves a high current ratio of read “1” to read “0” (108) and a retention time exceeding 1 s at 358 K. These characteristics suggest that the proposed device holds potential as a DRAM replacement in various applications.

Origin of performance degradation in vertical gate-all-around transistors using vertical InGaAs nanowires on SOI(111) substrates

Abstract Selective-area growth of InGaAs nanowires (NWs) and vertical gate-all-around (VGAA) transistors using the vertical InGaAs NWs on Silicon-on-insulator (SOI) substrates were characterized toward future three-dimensional integrated circuit applications using III-V NW-based VGAA transistors. On an n-type SOI, the VGAA transistor acts as a field-effect transistor (FET), involving carrier transport and the electrostatic modulation inside the InGaAs NW channels. While on a p-type SOI, the transistor exhibited tunnel FET properties, involving tunnel transport at the InGaAs NW/SOI interface. Characterization of the VGAA transistors with the variation of NW diameter revealed that device properties, including off-leakage current and subthreshold slope, were degraded with large NW diameter due to misfit dislocation at the NW/Si interface.

Analysis and Characterization Approach of Variation Behavior for Dopant-Segregated Tunnel FETs With Self-Aligned Drain Underlap

Analysis and Characterization Approach of Variation Behavior for Dopant-Segregated Tunnel FETs With Self-Aligned Drain Underlap

High-Sensitivity pH Sensing of Electrolytic Solutions Using Novel L-Shaped Tunnel FET

High-Sensitivity pH Sensing of Electrolytic Solutions Using Novel L-Shaped Tunnel FET