Translinear Loop Research Articles

A BJT translinear loop based optoelectronic integrated circuit with variable transimpedance for optical storage systems

A 0.35 μm SiGe BiCMOS optical receiver with voltage-controlled transimpedance is presented. A variable-gain current amplifier using a BJT translinear loop is applied. A transimpedance dynamic range of 1554 (63.8 dB) with the largest transimpedance of 2.84 M?, a bandwidth up to 379 MHz, and a transimpedance bandwidth product up to 168 T?Hz are achieved.

Low-Voltage MOS Translinear Analog Signal Processing

Different design procedures to operate MOS translinear loops at low supply voltage are presented. They utilize innovative biasing strategies based on flipped voltage followers and floating batteries. An alternate topology based on coupled negative feedback loops is also introduced. Simulation and measurement results for various test chip prototypes validate the proposed techniques and allow comparison among them.

Novel high-precision current-mode circuits based on the MOS-translinear principle

In this paper, a method to reduce the errors generated by the second order effects in the current-mode circuits employing MOS translinear loop is proposed. Using this method a square-root circuit, a squarer/divider circuit and a multiplier/divider circuit are designed and presented. They are suitable for standard CMOS fabrication and analog systems.

Configurable analogue building blocks for field-programmable analogue arrays

In this article, the design of configurable analogue blocks for field programmable analogue arrays is presented. The configurable blocks are capable of performing integration, differentiation, amplification, log, anti-log, add and negate functions. The realisation of these functions depends on differential continuous-time current-mode translinear loop techniques. To maintain high frequency operation, the programmability and configurability of the blocks are achieved by modifying the block's biasing conditions digitally. Simulation results for the presented circuits are included.

A new high speed and low power four-quadrant CMOS analog multiplier in current mode

In this paper a new CMOS current-mode four-quadrant analog multiplier and divider circuit based on squarer circuit is proposed. The dual translinear loop is the basic building block in realization scheme. Supply voltage is 3.3 V. The major advantages of this multiplier are high speed, low power, high linearity and less dc offset error. The circuit is designed and simulated using HSPICE simulator by level 49 parameters (BSIM3v3) in 0.35 μ m standard CMOS technology. The simulation results of analog multiplier demonstrate a linearity error of 1.1%, a THD of 0.97% in 1 MHz, a - 3 dB bandwidth of 41.8 MHz and a maximum power consumption of 0.34 mW.

MOS Translinear Principle for All Inversion Levels

In this brief, we derive a translinear principle for alternating loops of saturated MOS transistors that is valid at all levels of inversion starting from a simplified version of the Enz-Krummanacher-Vittoz model of the MOS transistor. This generalized translinear principle reduces to the conventional one when all transistors in a translinear loop are biased in weak inversion and it reduces to the voltage-translinear principle when all transistors in the loop are biased in strong inversion. We show experimental measurements from an alternating loop of four nMOS transistors that was fabricated in a 0.5-mum CMOS process through MOSIS to corroborate the generalized translinear principle. Finally, we discuss some potential applications of the principle.

A 1.2 V current-mode true RMS–DC converter based on the floating gate MOS translinear principle

A current-mode true RMS–DC converter based on a novel synthesis of translinear loop squarer/divider and simplified current-mode low-pass filter is presented. The circuit employs floating gate MOSFETs that operate in strong inverted saturation region for electronically simulated translinear loop. The converter features very low supply voltage (1.2V), two-quadrant input current, immunity from body effect, low circuit complexity, and wide input dynamic range. Simulation results by HSPICE show high performance of the circuit and confirm the validity of the proposed design technique.

A New Translinear-Based Dual-Output Square-Rooting Circuit

A new wide input range square-rooting circuit is presented. The proposed circuit consists of a dual translinear loop, an absolute value circuit, and current mirrors. A current-mode technique is used to provide wide input range with simple circuitry. The output signal of the proposed circuit is the current which is proportional to the square root of input current. The proposed square-rooting circuit was confirmed by using PSpice simulator program. The simulation results demonstrate that the proposed circuit provides the excellent temperature stability with wide input current range.

A $\pm$0.75-V Compact CMOS Class-AB Current-Mode Exponential Variable Gain Amplifier

In this brief, a novel class-AB implementation of a current-mode exponential variable gain amplifier (VGA) is presented. The VGA is based on a novel current amplifier circuit implemented by multicoupled MOS translinear loops operating in strong inversion and saturation. The gain is conveniently configured for performing a pseudo-exponential approximation leading to a very compact design since an extra multiplier is not needed. Moreover the VGA can operate with very low voltage and power efficiency. Measurement results from a fabricated prototype in a 0.5-mum n-well CMOS technology reveal gain control up to 12 dB with errors less than plusmn0.5 dB and power consumption of 375 muW for a supply voltage of plusmn0.75 V.

Low-Voltage CMOS subthreshold log-domain filtering

This paper presents both a complete set of very low-voltage basic building blocks and a compact design methodology for log filtering in standard or even digital CMOS technologies. The new proposals are based on an alternative translinear loop principle for the MOSFET operating in its subthreshold region. Three different sets of complete basic building blocks are proposed along with all required auxiliary circuitry and a specific matrix design procedure to obtain stable and compact filter implementations. Also, all-MOS filter implementations following these circuit techniques are studied. Simulated and experimental examples are given at 1-V supply voltage for 1.2and 0.35-/spl mu/m CMOS technologies. The resulting circuit techniques are suitable to integrate very low-voltage low-power system-on-a-chip audio applications, such as hearing aids, in standard CMOS technologies.

The flipped voltage follower: a useful cell for low-voltage low-power circuit design

In this paper, a basic cell for low-power and/or low-voltage operation is identified. It is evidenced how different versions of this cell, coined as "flipped voltage follower (FVF)" have been used in the past for many applications. A detailed classification of basic topologies derived from the FVF is given. In addition, a comprehensive list of recently proposed low-voltage/low-power CMOS circuits based on the FVF is given. Although the paper has a tutorial taste, some new applications of the FVF are also presented and supported by a set of simulated and experimental results. Finally, a design example showing the application of the FVF to build systems based on translinear loops is described which shows the potential of this cell for the design of high-performance low-power/low-voltage analog and mixed-signal circuits.

Low-voltage wide gm adjustable range highly linear BiCMOS OTA

A low distortion low-voltage BiCMOS OTA with wide gm adjustment range and constant input range is presented. It is based on a highly linear voltage-to-current converter input stage merged with translinear loops that implement linear electronically programmable current mirrors. Experimental results are provided that confirm the characteristics of the proposed OTA with a single 1.7V supply, 1.2V input range, two decades gain adjustment range, and 0.3% THD.

A Square-Root Domain Differentiator Circuit

Companding circuits are very useful blocks for realizing low-voltage, high-frequency analog systems. They are implemented using the translinear principle and the quadratic/exponential I-V characteristic of MOS/BJT transistor. In this paper, a Square-Root Domain differentiator is proposed. It is constructed from an appropriate input stage that converts the input current into a compressed voltage at a capacitor's node, and simultaneously senses the capacitor's current. The overall configuration of the differentiator also includes a current geometric-mean circuit and a multiplier, both based on a translinear loop. An attractive characteristic of the proposed circuits is their immunity to body effect. HSPICE simulation results were used for evaluating the behaviour of the differentiator.

Very Low Voltage MOS Translinear Loops Based on Flipped Voltage Followers

A novel technique for operating MOS Translinear loops at very low supply voltages is described, based on the use of Flipped Voltage Followers for biasing the loops. The resulting topologies, suited to standard CMOS processes, can be successfully applied to a varied repertory of low-voltage analog circuits, such as squarers, multipliers, filters, oscillators, and RMS-DC converters. Measurement results for a geometric-mean and a squarer/divider circuit demonstrate on silicon the usefulness of this technique.

Low-Voltage CMOS Nonlinear Transconductors and Their Application to Companding Current-Mode Filters

Two novel nonlinear CMOS transconductors that can be employed for building CMOS current-mode filters are presented and their performances compared to formerly proposed topologies aimed at the same goal. The first one is based on a previous topology proposed by the authors, where a new biasing procedure leads to an improved performance for low supply voltages. The second one follows a novel approach, based on cascading a transresistor and a transconductor. The analysis is complemented with a more general approach based on the identification of translinear loops present in the circuit. Both nonlinear transconductors can operate at supply voltages as low as one V GS plus two V DS of a saturated MOSFET. CMOS current-mode filters based on these blocks are built following companding techniques, and their correct operation is validated by simulation and experimental results.

1.5-V MOS translinear loops with improved dynamic range and their applications to current-mode signal processing

Novel MOS translinear loop topologies for very low-voltage applications are presented. The inclusion of dc level shifting, together with a novel biasing scheme based on two MOS transistors in the triode region, allows the operation of the loops at supply voltages as low as V/sub GS/+2V/sub DSsat/ maintaining at the same time a large dynamic range. Several current-mode translinear circuits, both static and dynamic, i.e., geometric mean, squarer/divider, multiplier and square-root-domain filters, are implemented following this approach, demonstrating on silicon the proposed techniques.

A 1.5 V Current-Mode CMOS RMS-to-DC Converter

A very low voltage, current-mode CMOS RMS-to-DC converter is presented. It is fully designed using MOS Translinear techniques. More specifically, its main building blocks are a squarer/divider and a geometric-mean cell which are obtained by using simple second-order MOS Translinear loops in a folded configuration, leading to a very regular and compact implementation. A novel biasing technique is employed for such loops, allowing them to operate at supply voltages as low as 1.5 V. Experimental results for a prototype IC demonstrating the correct operation of the circuit are included.

A SiGe HBT Translinear Harmonic Mixer

A novel even-order harmonic mixer is proposed. Based on the translinear loop of BJT/HBTs, frequency doubling and single-to-differential conversion circuits have been employed in the design of harmonic mixer. The proposed mixer has been verified in a SiGe HBT process by SpectreRF simulations.

High speed voltage follower for standard BiCMOS technology

A new wideband low-distortion class A unitary gain voltage follower is presented in this brief. Based on a Gilbert's translinear loop of four transistors, the proposed topology only includes high frequency n-p-n transistors in signal paths. The circuit has been simulated under /spl plusmn/1.5 V using the 0.8-/spl mu/m BiCMOS technology from AMS. Simulation results confirm low output distortion and high frequency operation performances. For a total power consumption of only 3 mW, the -3-dB bandwidth of the voltage transfer function is higher than 2.5 GHz with a 1-k/spl Omega/ loading resistance. The corresponding total harmonic distortion rate is lower than 0.06% when a 100-mV peak-to-peak input sinusoidal voltage is applied.

Syllabic-companding log domain filters

A general theory for companding log domain filters is proposed which combines not only exponential mappings, but also a new translational mapping approach which guarantees suitable operating conditions in any log domain filter. The filter equations resulting from the use of the theory ultimately contain translinear terms which are known to be realizable using translinear techniques. A discussion of the design of the companding filters, regarding the economical use of translinear loops and the convenient selection of system parameters, is offered which leads to first- and second-order circuit designs. Finally, the noise performance of an example design is investigated using a carefully crafted large-signal simulation technique, showing clearly the advantage of the companding filter approach.